Lines Matching refs:RIU_WriteByteMask
166 #define RIU_WriteByteMask( u32Reg, u8Val, u8Msk ) \ macro
2970 …RIU_WriteByteMask(L_BK_CLKGEN0(0x22), 0x00<<2, BMASK(3:2)); // 20090628 BY put mailbo0 clock sett… in HAL_AVD_VDMCU_SetClock()
2971 …RIU_WriteByteMask(H_BK_CLKGEN0(0x22), 0x00<<2, BMASK(3:2)); // 20090628 BY put mailbo1 clock sett… in HAL_AVD_VDMCU_SetClock()
2976 RIU_WriteByteMask(L_BK_CLKGEN0(0x21), 0x00, BMASK(4:2)); //20090611EL in HAL_AVD_VDMCU_SetClock()
2979 RIU_WriteByteMask(L_BK_CLKGEN0(0x21), BIT(2), BMASK(4:2)); //20090611EL in HAL_AVD_VDMCU_SetClock()
2982 RIU_WriteByteMask(L_BK_CLKGEN0(0x21), BIT(3), BMASK(4:2)); //20090611EL in HAL_AVD_VDMCU_SetClock()
2985 RIU_WriteByteMask(L_BK_CLKGEN0(0x21), BIT(3)|BIT(2), BMASK(4:2)); //20090611EL in HAL_AVD_VDMCU_SetClock()
2988 RIU_WriteByteMask(L_BK_CLKGEN0(0x21), BIT(4), BMASK(4:2)); //20090611EL in HAL_AVD_VDMCU_SetClock()
2991 RIU_WriteByteMask(L_BK_CLKGEN0(0x21), BIT(4)|BIT(2), BMASK(4:2)); //20090611EL in HAL_AVD_VDMCU_SetClock()
2994 RIU_WriteByteMask(L_BK_CLKGEN0(0x21), BIT(4)|BIT(3), BMASK(4:2)); //20090611EL in HAL_AVD_VDMCU_SetClock()
2997 RIU_WriteByteMask(L_BK_CLKGEN0(0x21), BIT(4)|BIT(3)|BIT(2), BMASK(4:2)); //20090611EL in HAL_AVD_VDMCU_SetClock()
3000 RIU_WriteByteMask(L_BK_CLKGEN0(0x21), BIT(4), BMASK(4:2)); //20090611EL in HAL_AVD_VDMCU_SetClock()
3006 RIU_WriteByteMask(L_BK_CLKGEN0(0x21), 0x00, BIT(1)); //20090611EL in HAL_AVD_VDMCU_SetClock()
3010 RIU_WriteByteMask(L_BK_CLKGEN0(0x21), BIT(1), BIT(1)); //20090611EL in HAL_AVD_VDMCU_SetClock()
3028 …RIU_WriteByteMask(L_BK_CLKGEN0(0x22), 0x00<<2, BMASK(3:2)); // 20090628 BY put mailbo0 clock sett… in HAL_AVD_VDMCU_SetClock()
3029 …RIU_WriteByteMask(H_BK_CLKGEN0(0x22), 0x00<<2, BMASK(3:2)); // 20090628 BY put mailbo1 clock sett… in HAL_AVD_VDMCU_SetClock()
3034 RIU_WriteByteMask(L_BK_CLKGEN0(0x21), BIT(4)|BIT(3)|BIT(2), BMASK(4:2)); //20090611EL in HAL_AVD_VDMCU_SetClock()
3037 RIU_WriteByteMask(L_BK_CLKGEN0(0x21), BIT(4)|BIT(3), BMASK(4:2)); //20090611EL in HAL_AVD_VDMCU_SetClock()
3040 RIU_WriteByteMask(L_BK_CLKGEN0(0x21), BIT(4)|BIT(2), BMASK(4:2)); //20090611EL in HAL_AVD_VDMCU_SetClock()
3043 RIU_WriteByteMask(L_BK_CLKGEN0(0x21), BIT(4), BMASK(4:2)); //20090611EL in HAL_AVD_VDMCU_SetClock()
3046 RIU_WriteByteMask(L_BK_CLKGEN0(0x21), BIT(3)|BIT(2), BMASK(4:2)); //20090611EL in HAL_AVD_VDMCU_SetClock()
3049 RIU_WriteByteMask(L_BK_CLKGEN0(0x21), BIT(3), BMASK(4:2)); //20090611EL in HAL_AVD_VDMCU_SetClock()
3052 RIU_WriteByteMask(L_BK_CLKGEN0(0x21), BIT(2), BMASK(4:2)); //20090611EL in HAL_AVD_VDMCU_SetClock()
3055 RIU_WriteByteMask(L_BK_CLKGEN0(0x21), 0x00, BMASK(4:2)); //20090611EL in HAL_AVD_VDMCU_SetClock()
3058 RIU_WriteByteMask(L_BK_CLKGEN0(0x21), BIT(3)|BIT(2), BMASK(4:2)); //20090611EL in HAL_AVD_VDMCU_SetClock()
3064 RIU_WriteByteMask(L_BK_CLKGEN0(0x21), 0x00, BIT(1)); //20090611EL in HAL_AVD_VDMCU_SetClock()
3068 RIU_WriteByteMask(L_BK_CLKGEN0(0x21), BIT(1), BIT(1)); //20090611EL in HAL_AVD_VDMCU_SetClock()
3131 RIU_WriteByteMask(VD_MCU_KEY, 0x50, 0xF0); in HAL_AVD_VDMCU_LoadDSP()
3170 RIU_WriteByteMask(VD_MCU_KEY, 0x00, 0xF0); in HAL_AVD_VDMCU_LoadDSP()
3442 RIU_WriteByteMask (BK_AFEC_D4, u8AfecD4, BMASK(7:0)); in HAL_AVD_AFEC_McuReset()
3443 RIU_WriteByteMask (BK_AFEC_D5, u8AfecD5, BMASK(7:0)); in HAL_AVD_AFEC_McuReset()
3444 RIU_WriteByteMask (BK_AFEC_D8, u8AfecD8 & (~ BIT(3)), BMASK(7:0)); in HAL_AVD_AFEC_McuReset()
3445 RIU_WriteByteMask (BK_AFEC_D9, u8AfecD9, BMASK(7:4)); in HAL_AVD_AFEC_McuReset()
3465 RIU_WriteByteMask(H_BK_ADC_ATOP(0x04), 0x00, (BIT(6)|BIT(4)|BIT(3))); in HAL_AVD_AFEC_SetClock()
3466 RIU_WriteByteMask(L_BK_ADC_ATOP(0x05), 0x00, (BIT(1))); in HAL_AVD_AFEC_SetClock()
3467 RIU_WriteByteMask(L_BK_ADC_ATOP(0x06), 0x00, (BIT(7))); in HAL_AVD_AFEC_SetClock()
3468 RIU_WriteByteMask(H_BK_ADC_ATOP(0x06), 0x00, (BIT(4))); in HAL_AVD_AFEC_SetClock()
3474 RIU_WriteByteMask(H_BK_ADC_ATOP(0x04), 0xFF, (BIT(6)|BIT(4)|BIT(3))); in HAL_AVD_AFEC_SetClock()
3475 RIU_WriteByteMask(L_BK_ADC_ATOP(0x05), 0xFF, (BIT(1))); in HAL_AVD_AFEC_SetClock()
3476 RIU_WriteByteMask(L_BK_ADC_ATOP(0x06), 0xFF, (BIT(7))); in HAL_AVD_AFEC_SetClock()
3477 RIU_WriteByteMask(H_BK_ADC_ATOP(0x06), 0xFF, (BIT(4))); in HAL_AVD_AFEC_SetClock()
3485 …RIU_WriteByteMask(H_BK_CLKGEN0(0x21), 0x00<<2, BMASK(3:2)); // 20090628 BY put VD200 clock settin… in HAL_AVD_AFEC_SetClock()
3486 RIU_WriteByteMask (L_BK_CLKGEN0(0x22), 0x00, BMASK(3:0));// CLK_mailbox0 in HAL_AVD_AFEC_SetClock()
3487 RIU_WriteByteMask (H_BK_CLKGEN0(0x22), 0x00, BMASK(3:0));// CLK_mailbox1 in HAL_AVD_AFEC_SetClock()
3511 RIU_WriteByteMask(L_BK_ADC_ATOP(0x04), 0x00, (BIT(3)|BIT(2)|BIT(1)|BIT(0))); in HAL_AVD_AFEC_SetClockSource()
3512 RIU_WriteByteMask(H_BK_ADC_ATOP(0x04), 0x00, (BIT(6)|BIT(3))); in HAL_AVD_AFEC_SetClockSource()
3513 RIU_WriteByteMask(L_BK_ADC_ATOP(0x05), 0x00, (BIT(1))); in HAL_AVD_AFEC_SetClockSource()
3514 RIU_WriteByteMask(L_BK_ADC_ATOP(0x06), 0x00, (BIT(7)|BIT(0))); in HAL_AVD_AFEC_SetClockSource()
3515 RIU_WriteByteMask(H_BK_ADC_ATOP(0x06), 0x00, (BIT(4)|BIT(2))); in HAL_AVD_AFEC_SetClockSource()
3516 RIU_WriteByteMask(H_BK_ADC_ATOP(0x5E), 0x00, (BIT(5))); // new after T4 in HAL_AVD_AFEC_SetClockSource()
3664 RIU_WriteByteMask(BK_AFEC_A2, 0x00,(BIT(4)|BIT(5))); // 2-line-delay ctrl by VD-DSP in HAL_AVD_AFEC_SetInput()
3684 RIU_WriteByteMask(BK_AFEC_A2, 0x00,(BIT(4)|BIT(5))); // 2-line-delay ctrl by VD-DSP in HAL_AVD_AFEC_SetInput()
3706 RIU_WriteByteMask(BK_AFEC_A2, 0x20,(BIT(4)|BIT(5))); // Disable 2-line-delay in HAL_AVD_AFEC_SetInput()
3744 RIU_WriteByteMask(BK_AFEC_A2, 0x00,(BIT(4)|BIT(5))); // 2-line-delay ctrl by VD-DSP in HAL_AVD_AFEC_SetInput()
3836 RIU_WriteByteMask( u16Temp + u8Adr, u8Value, u8Mask ); in HAL_AVD_AFEC_SetRegFromDSP()
3837 RIU_WriteByteMask( BK_AFEC_DC, VAL_UD7_FREE, MSK_UD7_STATE); in HAL_AVD_AFEC_SetRegFromDSP()
3854 RIU_WriteByteMask( BK_AFEC_DF, u8Value, 0xFF ); in HAL_AVD_AFEC_SetRegFromDSP()
3855 RIU_WriteByteMask( BK_AFEC_DC, VAL_UD7_READ_END, MSK_UD7_STATE ); in HAL_AVD_AFEC_SetRegFromDSP()
3921 RIU_WriteByteMask( BK_AFEC_CF, u8Mode << 0, BMASK(1:0) ); in HAL_AVD_AFEC_SetVtotal()
3990 RIU_WriteByteMask( BK_AFEC_CE, (u8FSCMode) << 1, BMASK(3:1) ); in HAL_AVD_AFEC_SetFSCMode()
4043 RIU_WriteByteMask(BK_AFEC_39, 0x03, BIT(1) | BIT(0)); // more reliability in HAL_AVD_AFEC_EnableBottomAverage()
4047 RIU_WriteByteMask(BK_AFEC_39, 0x00, BIT(1) | BIT(0)); // more sensitivity in HAL_AVD_AFEC_EnableBottomAverage()
4083 RIU_WriteByteMask (BK_AFEC_43, u8AgcMode << 5, BMASK(6:5)); in HAL_AVD_AFEC_AGCSetMode()
4104 RIU_WriteByteMask (BK_AFEC_3F, u8AgcCoarseGain, BMASK(3:0) ); in HAL_AVD_AFEC_AGCSetCoarseGain()
4167 RIU_WriteByteMask (BK_AFEC_9A, eVDHsyncSensitivityTuning.u8CNTRFailBeforeLock<< 4, BMASK(7:4)); in HAL_AVD_AFEC_SetHsyncSensitivity()
4168 RIU_WriteByteMask (BK_AFEC_9B, eVDHsyncSensitivityTuning.u8CNTRSyncBeforeLock << 0, BMASK(5:0)); in HAL_AVD_AFEC_SetHsyncSensitivity()
4169 RIU_WriteByteMask (BK_AFEC_9C, eVDHsyncSensitivityTuning.u8CNTRSyncAfterLock << 0, BMASK(5:0)); in HAL_AVD_AFEC_SetHsyncSensitivity()
4186 RIU_WriteByteMask (BK_AFEC_D8, u8Limit<< 4, BMASK(7:4)); in HAL_AVD_AFEC_SetSwingLimit()
4203 RIU_WriteByteMask( BK_AFEC_D8, BIT(3), BIT(3) ); // auto clear to 0 by dsp in HAL_AVD_AFEC_SetChannelChange()
4326 RIU_WriteByteMask( BK_COMB_10, 0x07, 0x07 ); in HAL_AVD_COMB_Set3dComb()
4341 RIU_WriteByteMask( BK_COMB_10, 0x02, 0x07 ); // 0x12 is recommended by designer in HAL_AVD_COMB_Set3dComb()
4362 RIU_WriteByteMask(BK_COMB_5F, u8COMB5F, BMASK(7:4)); in HAL_AVD_COMB_Set3dCombSpeed()
4398 RIU_WriteByteMask(BK_COMB_23, 0x02, BIT(3) | BIT(1)); in HAL_AVD_COMB_Set3dFineTune()
4404 RIU_WriteByteMask(BK_COMB_23, 0x08, BIT(3) | BIT(1)); in HAL_AVD_COMB_Set3dFineTune()
4485 RIU_WriteByteMask( BK_COMB_48, u8YCPipe, 0x30 ); in HAL_AVD_COMB_SetYCPipe()
4502 RIU_WriteByteMask( BK_COMB_6C, u8CbCrInverse, 0x0C ); in HAL_AVD_COMB_SetCbCrInverse()
4519 RIU_WriteByteMask( BK_COMB_40, u8Mode, (BIT(1)|BIT(0))); in HAL_AVD_COMB_SetVerticalTimingDetectMode()
4536 RIU_WriteByteMask(BK_COMB_50, u8Mode, 0x07); in HAL_AVD_COMB_SetLineBufferMode()
4632 RIU_WriteByteMask(BK_COMB_2A, 0x00, (BIT(4))); //weicheng 20130124 COMB memory issue. in HAL_AVD_COMB_SetMemoryRequest()
4634 RIU_WriteByteMask(BK_COMB_2A, 0x10, (BIT(4))); //weicheng 20121008 COMB memory issue. in HAL_AVD_COMB_SetMemoryRequest()