Lines Matching refs:RIU_WriteByteMask
171 #define RIU_WriteByteMask( u32Reg, u8Val, u8Msk ) \ macro
6329 …RIU_WriteByteMask(L_BK_CLKGEN0(0x22), 0x00<<2, BMASK(3:2)); // 20090628 BY put mailbo0 clock sett… in HAL_AVD_VDMCU_SetClock()
6330 …RIU_WriteByteMask(H_BK_CLKGEN0(0x22), 0x00<<2, BMASK(3:2)); // 20090628 BY put mailbo1 clock sett… in HAL_AVD_VDMCU_SetClock()
6335 RIU_WriteByteMask(L_BK_CLKGEN0(0x21), 0x00, BMASK(4:2)); //20090611EL in HAL_AVD_VDMCU_SetClock()
6338 RIU_WriteByteMask(L_BK_CLKGEN0(0x21), BIT(2), BMASK(4:2)); //20090611EL in HAL_AVD_VDMCU_SetClock()
6341 RIU_WriteByteMask(L_BK_CLKGEN0(0x21), BIT(3), BMASK(4:2)); //20090611EL in HAL_AVD_VDMCU_SetClock()
6344 RIU_WriteByteMask(L_BK_CLKGEN0(0x21), BIT(3)|BIT(2), BMASK(4:2)); //20090611EL in HAL_AVD_VDMCU_SetClock()
6347 RIU_WriteByteMask(L_BK_CLKGEN0(0x21), BIT(4), BMASK(4:2)); //20090611EL in HAL_AVD_VDMCU_SetClock()
6350 RIU_WriteByteMask(L_BK_CLKGEN0(0x21), BIT(4)|BIT(2), BMASK(4:2)); //20090611EL in HAL_AVD_VDMCU_SetClock()
6353 RIU_WriteByteMask(L_BK_CLKGEN0(0x21), BIT(4)|BIT(3), BMASK(4:2)); //20090611EL in HAL_AVD_VDMCU_SetClock()
6356 RIU_WriteByteMask(L_BK_CLKGEN0(0x21), BIT(4)|BIT(3)|BIT(2), BMASK(4:2)); //20090611EL in HAL_AVD_VDMCU_SetClock()
6359 RIU_WriteByteMask(L_BK_CLKGEN0(0x21), BIT(4), BMASK(4:2)); //20090611EL in HAL_AVD_VDMCU_SetClock()
6365 RIU_WriteByteMask(L_BK_CLKGEN0(0x21), 0x00, BIT(1)); //20090611EL in HAL_AVD_VDMCU_SetClock()
6369 RIU_WriteByteMask(L_BK_CLKGEN0(0x21), BIT(1), BIT(1)); //20090611EL in HAL_AVD_VDMCU_SetClock()
6393 …RIU_WriteByteMask(L_BK_CLKGEN0(0x22), 0x00<<2, BMASK(3:2)); // 20090628 BY put mailbo0 clock sett… in HAL_AVD_VDMCU_SetClock()
6394 …RIU_WriteByteMask(H_BK_CLKGEN0(0x22), 0x00<<2, BMASK(3:2)); // 20090628 BY put mailbo1 clock sett… in HAL_AVD_VDMCU_SetClock()
6399 RIU_WriteByteMask(L_BK_CLKGEN0(0x21), BIT(4)|BIT(3)|BIT(2), BMASK(4:2)); //20090611EL in HAL_AVD_VDMCU_SetClock()
6402 RIU_WriteByteMask(L_BK_CLKGEN0(0x21), BIT(4)|BIT(3), BMASK(4:2)); //20090611EL in HAL_AVD_VDMCU_SetClock()
6405 RIU_WriteByteMask(L_BK_CLKGEN0(0x21), BIT(4)|BIT(2), BMASK(4:2)); //20090611EL in HAL_AVD_VDMCU_SetClock()
6408 RIU_WriteByteMask(L_BK_CLKGEN0(0x21), BIT(4), BMASK(4:2)); //20090611EL in HAL_AVD_VDMCU_SetClock()
6411 RIU_WriteByteMask(L_BK_CLKGEN0(0x21), BIT(3)|BIT(2), BMASK(4:2)); //20090611EL in HAL_AVD_VDMCU_SetClock()
6414 RIU_WriteByteMask(L_BK_CLKGEN0(0x21), BIT(3), BMASK(4:2)); //20090611EL in HAL_AVD_VDMCU_SetClock()
6417 RIU_WriteByteMask(L_BK_CLKGEN0(0x21), BIT(2), BMASK(4:2)); //20090611EL in HAL_AVD_VDMCU_SetClock()
6420 RIU_WriteByteMask(L_BK_CLKGEN0(0x21), 0x00, BMASK(4:2)); //20090611EL in HAL_AVD_VDMCU_SetClock()
6423 RIU_WriteByteMask(L_BK_CLKGEN0(0x21), BIT(3)|BIT(2), BMASK(4:2)); //20090611EL in HAL_AVD_VDMCU_SetClock()
6429 RIU_WriteByteMask(L_BK_CLKGEN0(0x21), 0x00, BIT(1)); //20090611EL in HAL_AVD_VDMCU_SetClock()
6433 RIU_WriteByteMask(L_BK_CLKGEN0(0x21), BIT(1), BIT(1)); //20090611EL in HAL_AVD_VDMCU_SetClock()
6519 RIU_WriteByteMask(VD_MCU_KEY, 0x50, 0xF0); in HAL_AVD_VDMCU_LoadDSP()
6558 RIU_WriteByteMask(VD_MCU_KEY, 0x00, 0xF0); in HAL_AVD_VDMCU_LoadDSP()
6857 RIU_WriteByteMask (BK_AFEC_D4, u8AfecD4, BMASK(7:0)); in HAL_AVD_AFEC_McuReset()
6858 RIU_WriteByteMask (BK_AFEC_D5, u8AfecD5, BMASK(7:0)); in HAL_AVD_AFEC_McuReset()
6859 RIU_WriteByteMask (BK_AFEC_D8, u8AfecD8 & (~ BIT(3)), BMASK(7:0)); in HAL_AVD_AFEC_McuReset()
6860 RIU_WriteByteMask (BK_AFEC_D9, u8AfecD9, BMASK(7:4)); in HAL_AVD_AFEC_McuReset()
6880 RIU_WriteByteMask(H_BK_ADC_ATOP(0x04), 0x00, (BIT(6)|BIT(4)|BIT(3))); in HAL_AVD_AFEC_SetClock()
6881 RIU_WriteByteMask(L_BK_ADC_ATOP(0x05), 0x00, (BIT(1))); in HAL_AVD_AFEC_SetClock()
6882 RIU_WriteByteMask(L_BK_ADC_ATOP(0x06), 0x00, (BIT(7))); in HAL_AVD_AFEC_SetClock()
6883 RIU_WriteByteMask(H_BK_ADC_ATOP(0x06), 0x00, (BIT(4))); in HAL_AVD_AFEC_SetClock()
6894 RIU_WriteByteMask(H_BK_ADC_ATOP(0x04), 0xFF, (BIT(6)|BIT(4)|BIT(3))); in HAL_AVD_AFEC_SetClock()
6895 RIU_WriteByteMask(L_BK_ADC_ATOP(0x05), 0xFF, (BIT(1))); in HAL_AVD_AFEC_SetClock()
6896 RIU_WriteByteMask(L_BK_ADC_ATOP(0x06), 0xFF, (BIT(7))); in HAL_AVD_AFEC_SetClock()
6897 RIU_WriteByteMask(H_BK_ADC_ATOP(0x06), 0xFF, (BIT(4))); in HAL_AVD_AFEC_SetClock()
6910 …RIU_WriteByteMask(H_BK_CLKGEN0(0x21), 0x00<<2, BMASK(3:2)); // 20090628 BY put VD200 clock settin… in HAL_AVD_AFEC_SetClock()
6911 RIU_WriteByteMask (L_BK_CLKGEN0(0x22), 0x00, BMASK(3:0));// CLK_mailbox0 in HAL_AVD_AFEC_SetClock()
6912 RIU_WriteByteMask (H_BK_CLKGEN0(0x22), 0x00, BMASK(3:0));// CLK_mailbox1 in HAL_AVD_AFEC_SetClock()
6936 RIU_WriteByteMask(L_BK_ADC_ATOP(0x04), 0x00, (BIT(3)|BIT(2)|BIT(1)|BIT(0))); in HAL_AVD_AFEC_SetClockSource()
6937 RIU_WriteByteMask(H_BK_ADC_ATOP(0x04), 0x00, (BIT(6)|BIT(3))); in HAL_AVD_AFEC_SetClockSource()
6938 RIU_WriteByteMask(L_BK_ADC_ATOP(0x05), 0x00, (BIT(1))); in HAL_AVD_AFEC_SetClockSource()
6939 RIU_WriteByteMask(L_BK_ADC_ATOP(0x06), 0x00, (BIT(7)|BIT(0))); in HAL_AVD_AFEC_SetClockSource()
6940 RIU_WriteByteMask(H_BK_ADC_ATOP(0x06), 0x00, (BIT(4)|BIT(2))); in HAL_AVD_AFEC_SetClockSource()
6941 RIU_WriteByteMask(H_BK_ADC_ATOP(0x5E), 0x00, (BIT(5))); // new after T4 in HAL_AVD_AFEC_SetClockSource()
7100 RIU_WriteByteMask(BK_AFEC_A2, 0x00,(BIT(4)|BIT(5))); // 2-line-delay ctrl by VD-DSP in HAL_AVD_AFEC_SetInput()
7120 RIU_WriteByteMask(BK_AFEC_A2, 0x00,(BIT(4)|BIT(5))); // 2-line-delay ctrl by VD-DSP in HAL_AVD_AFEC_SetInput()
7142 RIU_WriteByteMask(BK_AFEC_A2, 0x20,(BIT(4)|BIT(5))); // Disable 2-line-delay in HAL_AVD_AFEC_SetInput()
7180 RIU_WriteByteMask(BK_AFEC_A2, 0x00,(BIT(4)|BIT(5))); // 2-line-delay ctrl by VD-DSP in HAL_AVD_AFEC_SetInput()
7272 RIU_WriteByteMask( u16Temp + u8Adr, u8Value, u8Mask ); in HAL_AVD_AFEC_SetRegFromDSP()
7273 RIU_WriteByteMask( BK_AFEC_DC, VAL_UD7_FREE, MSK_UD7_STATE); in HAL_AVD_AFEC_SetRegFromDSP()
7290 RIU_WriteByteMask( BK_AFEC_DF, u8Value, 0xFF ); in HAL_AVD_AFEC_SetRegFromDSP()
7291 RIU_WriteByteMask( BK_AFEC_DC, VAL_UD7_READ_END, MSK_UD7_STATE ); in HAL_AVD_AFEC_SetRegFromDSP()
7357 RIU_WriteByteMask( BK_AFEC_CF, u8Mode << 0, BMASK(1:0) ); in HAL_AVD_AFEC_SetVtotal()
7426 RIU_WriteByteMask( BK_AFEC_CE, (u8FSCMode) << 1, BMASK(3:1) ); in HAL_AVD_AFEC_SetFSCMode()
7479 RIU_WriteByteMask(BK_AFEC_39, 0x03, BIT(1) | BIT(0)); // more reliability in HAL_AVD_AFEC_EnableBottomAverage()
7483 RIU_WriteByteMask(BK_AFEC_39, 0x00, BIT(1) | BIT(0)); // more sensitivity in HAL_AVD_AFEC_EnableBottomAverage()
7519 RIU_WriteByteMask (BK_AFEC_43, u8AgcMode << 5, BMASK(6:5)); in HAL_AVD_AFEC_AGCSetMode()
7540 RIU_WriteByteMask (BK_AFEC_3F, u8AgcCoarseGain, BMASK(3:0) ); in HAL_AVD_AFEC_AGCSetCoarseGain()
7603 RIU_WriteByteMask (BK_AFEC_9A, eVDHsyncSensitivityTuning.u8CNTRFailBeforeLock<< 4, BMASK(7:4)); in HAL_AVD_AFEC_SetHsyncSensitivity()
7604 RIU_WriteByteMask (BK_AFEC_9B, eVDHsyncSensitivityTuning.u8CNTRSyncBeforeLock << 0, BMASK(5:0)); in HAL_AVD_AFEC_SetHsyncSensitivity()
7605 RIU_WriteByteMask (BK_AFEC_9C, eVDHsyncSensitivityTuning.u8CNTRSyncAfterLock << 0, BMASK(5:0)); in HAL_AVD_AFEC_SetHsyncSensitivity()
7622 RIU_WriteByteMask (BK_AFEC_D8, u8Limit<< 4, BMASK(7:4)); in HAL_AVD_AFEC_SetSwingLimit()
7639 RIU_WriteByteMask( BK_AFEC_D8, BIT(3), BIT(3) ); // auto clear to 0 by dsp in HAL_AVD_AFEC_SetChannelChange()
7765 RIU_WriteByteMask( BK_COMB_10, 0x07, 0x07 ); in HAL_AVD_COMB_Set3dComb()
7780 RIU_WriteByteMask( BK_COMB_10, 0x02, 0x07 ); // 0x12 is recommended by designer in HAL_AVD_COMB_Set3dComb()
7801 RIU_WriteByteMask(BK_COMB_5F, u8COMB5F, BMASK(7:4)); in HAL_AVD_COMB_Set3dCombSpeed()
7837 RIU_WriteByteMask(BK_COMB_23, 0x02, BIT(3) | BIT(1)); in HAL_AVD_COMB_Set3dFineTune()
7843 RIU_WriteByteMask(BK_COMB_23, 0x08, BIT(3) | BIT(1)); in HAL_AVD_COMB_Set3dFineTune()
7924 RIU_WriteByteMask( BK_COMB_48, u8YCPipe, 0x30 ); in HAL_AVD_COMB_SetYCPipe()
7941 RIU_WriteByteMask( BK_COMB_6C, u8CbCrInverse, 0x0C ); in HAL_AVD_COMB_SetCbCrInverse()
7958 RIU_WriteByteMask( BK_COMB_40, u8Mode, (BIT(1)|BIT(0))); in HAL_AVD_COMB_SetVerticalTimingDetectMode()
7975 RIU_WriteByteMask(BK_COMB_50, u8Mode, 0x07); in HAL_AVD_COMB_SetLineBufferMode()
8079 RIU_WriteByteMask(BK_COMB_2A, 0x00, (BIT(4))); //weicheng 20130124 COMB memory issue. in HAL_AVD_COMB_SetMemoryRequest()
8090 RIU_WriteByteMask(BK_COMB_2A, 0x10, (BIT(4))); //weicheng 20121008 COMB memory issue. in HAL_AVD_COMB_SetMemoryRequest()
8421 RIU_WriteByteMask(BK_AFEC_4C, u8BusrtStartPosition, 0x1F); in HAL_AVD_SetBurstWinStart()