Lines Matching refs:VD_STATUS_RDY
154 #undef VD_STATUS_RDY
155 #define VD_STATUS_RDY (BIT(8)) macro
2090 if ( (HAL_AVD_AFEC_GetStatus() & (VD_HSYNC_LOCKED | VD_STATUS_RDY | VD_COLOR_LOCKED)) in Drv_AVD_SetRegFromDSP()
2091 == (VD_HSYNC_LOCKED | VD_STATUS_RDY) ) in Drv_AVD_SetRegFromDSP()
2150 if ( IS_BITS_SET(u16Status, VD_HSYNC_LOCKED|VD_SYNC_LOCKED|VD_STATUS_RDY) ) in Drv_AVD_SetRegFromDSP()
2494 pResource->_u16CurVDStatus= VD_FSC_4433 | VD_STATUS_RDY; in Drv_AVD_SetVideoStandard()
2508 pResource->_u16CurVDStatus= VD_PAL_SWITCH | VD_FSC_4433 | VD_STATUS_RDY; in Drv_AVD_SetVideoStandard()
2537 pResource->_u16CurVDStatus = (VD_VSYNC_50HZ | VD_FSC_4285 | VD_STATUS_RDY); in Drv_AVD_SetVideoStandard()
2552 pResource->_u16CurVDStatus = (VD_PAL_SWITCH | VD_FSC_3575 | VD_STATUS_RDY); in Drv_AVD_SetVideoStandard()
2567 pResource->_u16CurVDStatus = (VD_VSYNC_50HZ | VD_PAL_SWITCH | VD_FSC_3582 | VD_STATUS_RDY); in Drv_AVD_SetVideoStandard()
2582 pResource->_u16CurVDStatus = (VD_FSC_3579 | VD_STATUS_RDY); in Drv_AVD_SetVideoStandard()
2596 pResource->_u16CurVDStatus = (VD_VSYNC_50HZ | VD_PAL_SWITCH | VD_FSC_4433 | VD_STATUS_RDY); in Drv_AVD_SetVideoStandard()
3116 if ( !IS_BITS_SET(u16Status, VD_HSYNC_LOCKED|VD_SYNC_LOCKED|VD_STATUS_RDY) ) in Drv_AVD_GetStandardDetection()
3281 if( IS_BITS_SET(u16Status, VD_HSYNC_LOCKED | VD_STATUS_RDY) ) in Drv_AVD_GetVerticalFreq()
3365 if ( IS_BITS_SET(HAL_AVD_AFEC_GetStatus(), VD_INTERLACED | VD_HSYNC_LOCKED | VD_STATUS_RDY) ) in Drv_AVD_IsSignalInterlaced()
3374 if ( IS_BITS_SET(HAL_AVD_AFEC_GetStatus(), VD_COLOR_LOCKED | VD_HSYNC_LOCKED | VD_STATUS_RDY) ) in Drv_AVD_IsColorOn()
3445 if((u16Status & VD_STATUS_RDY) != VD_STATUS_RDY) //VD status Not ready in vd_str_stablestatus()
3472 if((u16Status & VD_STATUS_RDY) != VD_STATUS_RDY) //VD status Not ready in vd_str_stablestatus()
3542 if (!IS_BITS_SET(u16Status, VD_HSYNC_LOCKED|VD_SYNC_LOCKED|VD_STATUS_RDY)) in vd_str_timingchangedetection()