Lines Matching refs:temp
326 U32 temp = ehci_readl ((U32)&ehci->regs->status); in ehci_halt() local
328 if ((temp & STS_HALT) != 0) in ehci_halt()
379 temp = ehci_readl ((U32)&ehci->regs->command); in ehci_halt()
380 temp &= ~CMD_RUN; in ehci_halt()
381 ehci_writel (temp, (U32)&ehci->regs->command); in ehci_halt()
457 U32 temp; in ehci_ready() local
466 temp = 0; in ehci_ready()
468 temp = STS_ASS; in ehci_ready()
470 temp |= STS_PSS; in ehci_ready()
472 temp, 16 * 125) != 0) { in ehci_ready()
530 temp = ehci_readl ((U32)&ehci->regs->command); in ehci_ready()
531 temp &= ~(CMD_ASE | CMD_IAAD | CMD_PSE); in ehci_ready()
532 ehci_writel (temp, (U32)&ehci->regs->command); in ehci_ready()
680 U32 temp, status = 0; in ehci_hub_status_data() local
745 temp = ehci_readl ((U32)&ehci->regs->port_status[i]); in ehci_hub_status_data()
796 if ( ((temp & PORT_CONNECT) == 0) && ((hcd->pre_sts & PORT_CONNECT) != 0) ) in ehci_hub_status_data()
799 temp |= PORT_CSC; in ehci_hub_status_data()
801 hcd->pre_sts = temp; in ehci_hub_status_data()
805 if (temp & PORT_OWNER) { in ehci_hub_status_data()
807 if (temp & PORT_CSC) { in ehci_hub_status_data()
808 temp &= ~PORT_CSC; in ehci_hub_status_data()
809 ehci_writel (temp, (U32)&ehci->regs->port_status [i]); in ehci_hub_status_data()
814 if (!(temp & PORT_CONNECT)) in ehci_hub_status_data()
871 if ((temp & (PORT_CSC)) != 0) { in ehci_hub_status_data()
1036 U16 temp; in ehci_hub_descriptor() local
1139 temp = 1 + (ports / 8); in ehci_hub_descriptor()
1140 desc->bDescLength = 7 + 2 * temp; in ehci_hub_descriptor()
1191 memset (&desc->bitmap [0], 0, temp); in ehci_hub_descriptor()
1192 memset (&desc->bitmap [temp], 0xff, temp); in ehci_hub_descriptor()
1194 temp = 0x0008; /* per-port overcurrent reporting */ in ehci_hub_descriptor()
1196 temp |= 0x0001; /* per-port power control */ in ehci_hub_descriptor()
1198 temp |= 0x0080; /* per-port indicators (LEDs) */ in ehci_hub_descriptor()
1199 desc->wHubCharacteristics = CPUToLE16(temp); in ehci_hub_descriptor()
1262 U32 temp, status,bus_monitor; in ehci_hub_control() local
1336 temp = ehci_readl ((U32)&ehci->regs->port_status [wIndex]); in ehci_hub_control()
1337 if (temp & PORT_OWNER) in ehci_hub_control()
1347 ehci_writel (temp & ~PORT_PE, (U32)&ehci->regs->port_status [wIndex]); in ehci_hub_control()
1405 ehci_writel (temp | PORT_PEC, in ehci_hub_control()
1414 ehci_writel (temp & ~PORT_POWER, in ehci_hub_control()
1418 ehci_writel (temp | PORT_CSC, in ehci_hub_control()
1471 ehci_writel (temp | PORT_OCC, in ehci_hub_control()
1480 temp = ehci_readl ((U32)&ehci->regs->command); /* unblock posted write */ in ehci_hub_control()
1545 temp = ehci_readl ((U32)&ehci->regs->port_status [wIndex]); in ehci_hub_control()
1547 if ( ((temp & PORT_CONNECT) == 0) && ((temp & PORT_CSC) == 0) ) in ehci_hub_control()
1551 diag_printf("<ehci_hub_control> GetPortStatus:Add CSC here, pStatus = %x\n", temp); in ehci_hub_control()
1552 temp |= PORT_CSC; in ehci_hub_control()
1555 hcd->pre_temp = temp; in ehci_hub_control()
1558 if (temp & PORT_CSC) in ehci_hub_control()
1560 if (temp & PORT_PEC) in ehci_hub_control()
1563 if (temp & PORT_OCC) in ehci_hub_control()
1567 if ((temp & PORT_RESET) in ehci_hub_control()
1577 ehci_writel (temp & ~PORT_RESET, in ehci_hub_control()
1580 temp = ehci_readl ( in ehci_hub_control()
1583 } while ((temp&(PORT_RESET|PORT_CONNECT)) == (PORT_RESET|PORT_CONNECT)&&(time_out++<10000)); in ehci_hub_control()
1614 temp = check_reset_complete (ehci, wIndex, temp); in ehci_hub_control()
1618 if (!(temp & PORT_OWNER)) { in ehci_hub_control()
1619 if (temp & PORT_CONNECT) { in ehci_hub_control()
1630 if (temp & PORT_PE) in ehci_hub_control()
1632 if (temp & PORT_SUSPEND) in ehci_hub_control()
1683 if (temp & PORT_OC) in ehci_hub_control()
1685 if (temp & PORT_RESET) in ehci_hub_control()
1687 if (temp & PORT_POWER) in ehci_hub_control()
1694 dbg_port (ehci, "GetStatus", wIndex + 1, temp); in ehci_hub_control()
1768 temp = ehci_readl ((U32)&ehci->regs->port_status [wIndex]); in ehci_hub_control()
1771 if (temp & PORT_OWNER) in ehci_hub_control()
1778 ehci_writel (temp | PORT_SUSPEND, in ehci_hub_control()
1783 ehci_writel (temp | PORT_POWER, in ehci_hub_control()
1791 if ((temp & (PORT_PE|PORT_CONNECT)) == PORT_CONNECT in ehci_hub_control()
1792 && PORT_USB11 (temp)) { in ehci_hub_control()
1793 diag_printf("temp: %x\n", temp); in ehci_hub_control()
1797 temp |= PORT_OWNER; in ehci_hub_control()
1802 temp |= PORT_RESET; in ehci_hub_control()
1803 temp &= ~PORT_PE; in ehci_hub_control()
1854 if( temp&PORT_CONNECT ) in ehci_hub_control()
1863 ehci_writel (temp, (U32)&ehci->regs->port_status [wIndex]); // port reset in ehci_hub_control()
1869 temp = ehci_readl ((U32)&ehci->regs->command); /* unblock posted writes */ in ehci_hub_control()
3447 struct list_head *entry, *temp; in qtd_list_free() local
3449 list_for_each_safe (entry, temp, qtd_list) { in qtd_list_free()
6171 int temp; in scan_async() local
6223 temp = qh_completions (ehci, qh, regs); in scan_async()
6225 if (temp != 0) { in scan_async()
6703 U32 temp; in ehci_hc_reset() local
6762 temp = HCC_EXT_CAPS (ehci_readl ((U32)&ehci->caps->hcc_params)); in ehci_hc_reset()
6763 while (temp) { in ehci_hc_reset()
6766 pci_read_config_dword (ehci->hcd.pdev, temp, &cap); in ehci_hc_reset()
6768 ehci_dbg (ehci, "capability %04x at %02x\n", cap, temp); in ehci_hc_reset()
6832 temp = (cap >> 8) & 0xff; in ehci_hc_reset()
6847 U32 temp; in ehci_start() local
6979 temp=ehci_readl((U32)&ehci->regs->bus_control); in ehci_start()
6981 temp|=INT_POLAR; in ehci_start()
6982 temp&=~VBUS_OFF; in ehci_start()
6983 ehci_writel(temp,(U32)&ehci->regs->bus_control); //set intr high active in ehci_start()
7159 temp = ehci_readl ((U32)&ehci->regs->command) & 0x0fff; in ehci_start()
7162 temp |= 1 << (16 + log2_irq_thresh); in ehci_start()
7173 temp |= CMD_PARK; in ehci_start()
7174 temp |= park_eco << 8; in ehci_start()
7182 temp &= ~(3 << 2); in ehci_start()
7183 temp |= (EHCI_TUNE_FLS << 2); in ehci_start()
7240 temp &= ~(CMD_IAAD | CMD_ASE | CMD_PSE), in ehci_start()
7246 temp |= CMD_RUN;//mark by yuwen in ehci_start()
7248 ehci_writel (temp, (U32)&ehci->regs->command); in ehci_start()
7249 dbg_cmd (ehci, "init", temp); in ehci_start()
7320 temp = ehci_readl ((U32)&ehci->regs->command); /* unblock posted write */ in ehci_start()
7377 temp = ehci_readw ((U32)&ehci->caps->hci_version); in ehci_start()
7381 temp >> 8, temp & 0xff, DRIVER_VERSION); in ehci_start()
7719 int temp = ehci_readl ((U32)&ehci->regs->port_status [i]); in ehci_suspend() local
7721 if ((temp & PORT_PE) == 0 in ehci_suspend()
7722 || (temp & PORT_OWNER) != 0) in ehci_suspend()
7725 if (((temp & PORT_PE) == 0)) in ehci_suspend()
7729 temp |= PORT_SUSPEND; in ehci_suspend()
7730 ehci_writel (temp, (U32)&ehci->regs->port_status [i]); in ehci_suspend()
7800 int temp = ehci_readl ((U32)&ehci->regs->port_status [i]); in ehci_resume() local
7801 if ((temp & PORT_PE) == 0 in ehci_resume()
7802 || (temp & PORT_SUSPEND) != 0) in ehci_resume()
7805 temp |= PORT_RESUME; in ehci_resume()
7806 ehci_writel (temp, (U32)&ehci->regs->port_status [i]); in ehci_resume()
7809 temp &= ~PORT_RESUME; in ehci_resume()
7810 ehci_writel (temp, (U32)&ehci->regs->port_status [i]); in ehci_resume()
9613 U32 temp; in ehci_StopRun_Setting() local
9617 temp = ehci_readl((U32)&ehci->regs->command); in ehci_StopRun_Setting()
9618 if (temp & CMD_RUN) in ehci_StopRun_Setting()
9621 temp |= CMD_RUN; in ehci_StopRun_Setting()
9622 ehci_writel(temp, (U32)&ehci->regs->command); in ehci_StopRun_Setting()
9624 temp = ehci_readl((U32)&ehci->regs->command); in ehci_StopRun_Setting()
9625 } while ((temp & CMD_RUN) == 0); in ehci_StopRun_Setting()
9629 temp = ehci_readl((U32)&ehci->regs->command); in ehci_StopRun_Setting()
9630 if ((temp & CMD_RUN) == 0) in ehci_StopRun_Setting()
9633 temp &= ~CMD_RUN; in ehci_StopRun_Setting()
9634 ehci_writel(temp, (U32)&ehci->regs->command); in ehci_StopRun_Setting()
9636 temp = ehci_readl((U32)&ehci->regs->command); in ehci_StopRun_Setting()
9637 } while ((temp & CMD_RUN) > 0); in ehci_StopRun_Setting()