Lines Matching refs:regs
326 U32 temp = ehci_readl ((U32)&ehci->regs->status); in ehci_halt()
379 temp = ehci_readl ((U32)&ehci->regs->command); in ehci_halt()
381 ehci_writel (temp, (U32)&ehci->regs->command); in ehci_halt()
383 return handshake (&ehci->regs->status, STS_HALT, STS_HALT, 16 * 125); in ehci_halt()
389 U32 command = ehci_readl ((U32)&ehci->regs->command); in ehci_reset()
394 ehci_writel (command, (U32)&ehci->regs->command); in ehci_reset()
446 command = handshake (&ehci->regs->command, CMD_RESET, 0, 250 * 1000); in ehci_reset()
471 if (handshake (&ehci->regs->status, STS_ASS | STS_PSS, in ehci_ready()
530 temp = ehci_readl ((U32)&ehci->regs->command); in ehci_ready()
532 ehci_writel (temp, (U32)&ehci->regs->command); in ehci_ready()
535 if (handshake (&ehci->regs->status, STS_ASS | STS_PSS, in ehci_ready()
617 ehci_writel (port_status, (U32)&ehci->regs->port_status [index]); in check_reset_complete()
745 temp = ehci_readl ((U32)&ehci->regs->port_status[i]); in ehci_hub_status_data()
809 ehci_writel (temp, (U32)&ehci->regs->port_status [i]); in ehci_hub_status_data()
1214 regTmp[0] = ehci_readl((U32)&ehci->regs->command); in ehci_hc_swreset()
1215 regTmp[1] = ehci_readl((U32)&ehci->regs->intr_enable); in ehci_hc_swreset()
1235 ehci_writel(regTmp[1],(U32)&ehci->regs->intr_enable); in ehci_hc_swreset()
1236 ehci_writel(regTmp[0],(U32)&ehci->regs->command); in ehci_hc_swreset()
1336 temp = ehci_readl ((U32)&ehci->regs->port_status [wIndex]); in ehci_hub_control()
1347 ehci_writel (temp & ~PORT_PE, (U32)&ehci->regs->port_status [wIndex]); in ehci_hub_control()
1350 …ehci_writel(ehci_readl((U32)&ehci->regs->command)&(~(CMD_ASE|CMD_PSE|CMD_IAAD)),(U32)&ehci->regs->… in ehci_hub_control()
1406 (U32)&ehci->regs->port_status [wIndex]); in ehci_hub_control()
1415 (U32)&ehci->regs->port_status [wIndex]); in ehci_hub_control()
1419 (U32)&ehci->regs->port_status [wIndex]); in ehci_hub_control()
1472 (U32)&ehci->regs->port_status [wIndex]); in ehci_hub_control()
1480 temp = ehci_readl ((U32)&ehci->regs->command); /* unblock posted write */ in ehci_hub_control()
1545 temp = ehci_readl ((U32)&ehci->regs->port_status [wIndex]); in ehci_hub_control()
1578 (U32)&ehci->regs->port_status [wIndex]); in ehci_hub_control()
1581 (U32)&ehci->regs->port_status [wIndex]); in ehci_hub_control()
1598 speed = (ehci_readl((U32)&ehci->regs->bus_control) >> 9) & 0x3; in ehci_hub_control()
1601 temp2 = ehci_readl((U32)&ehci->regs->hcmisc) & 0xfffffff3; in ehci_hub_control()
1612 ehci_writel (temp2, (U32)&ehci->regs->hcmisc); // misc, EOF1 in ehci_hub_control()
1621 bus_monitor=ehci_readl ((U32)&ehci->regs->bus_control); in ehci_hub_control()
1768 temp = ehci_readl ((U32)&ehci->regs->port_status [wIndex]); in ehci_hub_control()
1779 (U32)&ehci->regs->port_status [wIndex]); in ehci_hub_control()
1784 (U32)&ehci->regs->port_status [wIndex]); in ehci_hub_control()
1818 …ehci_writel(ehci_readl((U32)&ehci->regs->command)&(~(CMD_RUN|CMD_ASE|CMD_PSE)),(U32)&ehci->regs->c… in ehci_hub_control()
1821 while(((ehci_readl((U32)&ehci->regs->status)&STS_HALT) == 0)&&(time_out++<1000)); in ehci_hub_control()
1837 …ehci_writel(ehci_readl((U32)&ehci->regs->command)&(~(CMD_RUN|CMD_ASE|CMD_PSE)),(U32)&ehci->regs->c… in ehci_hub_control()
1840 while(((ehci_readl((U32)&ehci->regs->status)&STS_HALT) == 0)&&(time_out++<1000)); in ehci_hub_control()
1863 ehci_writel (temp, (U32)&ehci->regs->port_status [wIndex]); // port reset in ehci_hub_control()
1869 temp = ehci_readl ((U32)&ehci->regs->command); /* unblock posted writes */ in ehci_hub_control()
2658 ehci_urb_done (struct ehci_hcd *ehci, struct urb *urb, struct pt_regs *regs) in ehci_urb_done() argument
2842 usb_hcd_giveback_urb (&ehci->hcd, urb, regs); in ehci_urb_done()
2898 qh_completions (struct ehci_hcd *ehci, struct ehci_qh *qh, struct pt_regs *regs) in qh_completions() argument
3029 ehci_urb_done (ehci, last->urb, regs); in qh_completions()
3313 ehci_urb_done (ehci, last->urb, regs); in qh_completions()
5046 U32 cmd = ehci_readl ((U32)&ehci->regs->command); in qh_link_async()
5050 (void) handshake (&ehci->regs->status, STS_ASS, 0, 150); in qh_link_async()
5052 ehci_writel (cmd, (U32)&ehci->regs->command); in qh_link_async()
5130 U32 cmd = ehci_readl (&ehci->regs->command);
5133 while (ehci_readl (&ehci->regs->status) & STS_ASS)
5189 ehci_writel ((U32)qh->qh_dma, &ehci->regs->async_next);
5191 ehci_writel (cmd, &ehci->regs->command);
5766 static void end_unlink_async (struct ehci_hcd *ehci, struct pt_regs *regs) in end_unlink_async() argument
5833 qh_completions (ehci, qh, regs); in end_unlink_async()
5903 int cmd = ehci_readl ((U32)&ehci->regs->command); in start_unlink_async()
5970 ehci_writel (cmd & ~CMD_ASE, (U32)&ehci->regs->command); in start_unlink_async()
6050 ehci_writel (cmd, (U32)&ehci->regs->command); in start_unlink_async()
6108 scan_async (struct ehci_hcd *ehci, struct pt_regs *regs) in scan_async() argument
6223 temp = qh_completions (ehci, qh, regs); in scan_async()
6360 static void ehci_work(struct ehci_hcd *ehci, struct pt_regs *regs);
6425 U32 status = ehci_readl ((U32)&ehci->regs->status); in ehci_watchdog()
6430 ehci_writel (STS_IAA, (U32)&ehci->regs->status); in ehci_watchdog()
6482 else if ( (ehci_readl((U32)&ehci->regs->command)&CMD_IAAD) && !(status & STS_IAA)) in ehci_watchdog()
6707 ehci->caps = (struct ehci_caps *) hcd->regs; in ehci_hc_reset()
6708 ehci->regs = (struct ehci_regs *) ( (U32)hcd->regs + in ehci_hc_reset()
6978 ehci_writel (INTR_MASK, (U32)&ehci->regs->intr_enable); in ehci_start()
6979 temp=ehci_readl((U32)&ehci->regs->bus_control); in ehci_start()
6983 ehci_writel(temp,(U32)&ehci->regs->bus_control); //set intr high active in ehci_start()
6984 ehci_writel (ehci->periodic_dma, (U32)&ehci->regs->frame_list); in ehci_start()
7092 ehci_writel ((U32)ehci->async->qh_dma, (U32)&ehci->regs->async_next); in ehci_start()
7096 ehci_writel (0, (U32)&ehci->regs->segment); in ehci_start()
7159 temp = ehci_readl ((U32)&ehci->regs->command) & 0x0fff; in ehci_start()
7248 ehci_writel (temp, (U32)&ehci->regs->command); in ehci_start()
7320 temp = ehci_readl ((U32)&ehci->regs->command); /* unblock posted write */ in ehci_start()
7592 dbg_status (ehci, "ehci_stop completed", ehci_readl ((U32)&ehci->regs->status)); in ehci_stop()
7647 return (ehci_readl ((U32)&ehci->regs->frame_index) >> 3) % ehci->periodic_size; in ehci_get_frame()
7714 ehci_writel(ehci_readl ((U32)&ehci->regs->command) & ~CMD_RUN, (U32)&ehci->regs->command); in ehci_suspend()
7715 while((ehci_readl((U32)&ehci->regs->status)&STS_HALT) == 0); in ehci_suspend()
7719 int temp = ehci_readl ((U32)&ehci->regs->port_status [i]); in ehci_suspend()
7730 ehci_writel (temp, (U32)&ehci->regs->port_status [i]); in ehci_suspend()
7800 int temp = ehci_readl ((U32)&ehci->regs->port_status [i]); in ehci_resume()
7806 ehci_writel (temp, (U32)&ehci->regs->port_status [i]); in ehci_resume()
7807 tmp = ehci_readl ((U32)&ehci->regs->command); /* unblock posted writes */ in ehci_resume()
7810 ehci_writel (temp, (U32)&ehci->regs->port_status [i]); in ehci_resume()
7812 tmp = ehci_readl ((U32)&ehci->regs->command); /* unblock posted writes */ in ehci_resume()
7819 static void ehci_work (struct ehci_hcd *ehci, struct pt_regs *regs) in ehci_work() argument
7827 end_unlink_async (ehci, regs); in ehci_work()
7828 scan_async (ehci, regs); in ehci_work()
7882 scan_async (ehci, regs); in ehci_work()
7883 end_unlink_async (ehci, regs); in ehci_work()
7887 scan_periodic (ehci, regs); in ehci_work()
7898 void ehci_irq (struct usb_hcd *hcd, struct pt_regs *regs) in ehci_irq() argument
7910 status = ehci_readl ((U32)&ehci->regs->status); in ehci_irq()
7973 ehci_writel (status, (U32)&ehci->regs->status); in ehci_irq()
7974 cmd_t = ehci_readl ((U32)&ehci->regs->command); /* unblock posted write */ in ehci_irq()
7992 int cmd = ehci_readl ((U32)&ehci->regs->command); in ehci_irq()
7994 ehci_writel (cmd, (U32)&ehci->regs->command); in ehci_irq()
7995 (void) ehci_readl ((U32)&ehci->regs->command); in ehci_irq()
8139 int pstatus = ehci_readl((U32)&ehci->regs->port_status [i]); in ehci_irq()
8228 ehci_work (ehci, regs); in ehci_irq()
8304 if( (ehci_readl ((U32)&ehci->regs->port_status[0])&PORT_CONNECT) == 0 ) in ehci_urb_enqueue()
8555 if( (ehci_readl ((U32)&ehci->regs->port_status[0])&PORT_CONNECT) == 0 ) in ehci_urb_dequeue()
8569 else if ( (ehci_readl ((U32)&ehci->regs->command)&CMD_RUN) == 0 ) in ehci_urb_dequeue()
9253 hcd->regs = (U32*) gBaseUHC; in usb_hcd_cpe_ehci_probe()
9305 hcd->description, hcd->regs, hcd->irq); in usb_hcd_cpe_ehci_probe()
9617 temp = ehci_readl((U32)&ehci->regs->command); in ehci_StopRun_Setting()
9622 ehci_writel(temp, (U32)&ehci->regs->command); in ehci_StopRun_Setting()
9624 temp = ehci_readl((U32)&ehci->regs->command); in ehci_StopRun_Setting()
9629 temp = ehci_readl((U32)&ehci->regs->command); in ehci_StopRun_Setting()
9634 ehci_writel(temp, (U32)&ehci->regs->command); in ehci_StopRun_Setting()
9636 temp = ehci_readl((U32)&ehci->regs->command); in ehci_StopRun_Setting()
9681 hcd->regs = (U32*) dev->mapbase; in usb_hcd_cpe_ehci_probe_EX()
9699 hcd->description, hcd->regs, hcd->irq); in usb_hcd_cpe_ehci_probe_EX()