Lines Matching refs:U32
149 U32 normal;
150 U32 error;
151 U32 reclaim;
152 U32 lost_iaa;
155 U32 complete;
156 U32 unlink;
188 U32 periodic_size;
189 U32 *periodic_rptr; /*Real pointer for allocated memory for peridic link array*/
190 U32 *periodic; /* hw periodic table */
192 U32 i_thresh; /* uframes HC might cache */
213 U32 periodic_sched; /* periodic activity count */
265 U32 reset_done [EHCI_MAX_ROOT_PORTS];
271 U32 hcs_params; /* cached register copy */
379 U32 actions;
380 U32 stamp;
447 U32 flags; in timer_action_done()
451 clear_bit (action, &ehci->actions, U32); in timer_action_done()
487 U32 t; in timer_action()
543 && (t+jiffies) > (U32) ehci->watchdog.base_jiffies in timer_action()
595 U32 hcs_params; /* HCSPARAMS - offset 0x4 */
669 U32 hcc_params; /* HCCPARAMS - offset 0x8 */
735 U32 command;
799 U32 status;
963 U32 intr_enable;
966 U32 frame_index; /* current microframe number */
1018 U32 segment; /* address bits 63:32 if needed */
1020 U32 frame_list; /* points to periodic list */
1022 U32 async_next; /* address of next async queue head */
1023 U32 reserved2; /*0x1c*/
1058 U32 port_status[1]; /* up to N_PORTS */
1280 U32 hcmisc;
1281 U32 reserved[2];
1283 U32 bus_control; /*Bus monitor control, offset:0x30*/
1287 U32 reserved1 [3];
1307 U32 test_register;
1316 #define QTD_NEXT(dma) CPUToLE32((U32)dma)
1337 U32 hw_next; /* see EHCI 3.5.1 */
1338 U32 hw_alt_next; /* see EHCI 3.5.2 */
1339 U32 hw_token; /* see EHCI 3.5.3 */
1357 #define QTD_TOGGLE ((U32)1 << 31) /* data toggle */
1359 #define QTD_IOC ((U32)1 << 15) /* interrupt on complete */
1362 #define QTD_STS_ACTIVE ((U32)1 << 7) /* HC may execute this */
1363 #define QTD_STS_HALT ((U32)1 << 6) /* halted on error */
1364 #define QTD_STS_DBE ((U32)1 << 5) /* data buffer error (in HC) */
1414 #define QTD_STS_BABBLE ((U32)1 << 4) /* device was babbling (qtd halted) */
1415 #define QTD_STS_XACT ((U32)1 << 3) /* device gave illegal response */
1416 #define QTD_STS_MMF ((U32)1 << 2) /* incomplete split transaction */
1417 #define QTD_STS_STS ((U32)1 << 1) /* split transaction state */
1418 #define QTD_STS_PING ((U32)1 << 0) /* issue PING? */
1468 U32 hw_buf [5]; /* see EHCI 3.5.4 */
1469 U32 hw_buf_hi [5]; /* Appendix B */
1558 #define QH_NEXT(dma) (CPUToLE32(((U32)dma)&~0x01f)|Q_TYPE_QH)
1649 U32 *hw_next;
1690 U32 hw_next;
1691 U32 hw_info1;
1743 U32 hw_info2;
1744 U32 hw_current;
1763 U32 hw_qtd_next;
1764 U32 hw_alt_next;
1765 U32 hw_token;
1799 U32 hw_buf [5];
1800 U32 hw_buf_hi [5];
1860 U32 stamp;
1964 U32 hw_next;
1965 U32 hw_transaction [8];
1983 #define EHCI_ISOC_ACTIVE ((U32)1<<31)
1984 #define EHCI_ISOC_BUF_ERR ((U32)1<<30)
1985 #define EHCI_ISOC_BABBLE ((U32)1<<29)
1986 #define EHCI_ISOC_XACTERR ((U32)1<<28)
1987 #define EHCI_ITD_LENGTH(tok) (((U32)(tok)>>16) & 0x7fff)
1988 #define EHCI_ITD_IOC ((U32)1 << 15)
2022 U32 hw_bufp [7];
2023 U32 hw_bufp_hi [7];
2098 U32 transaction;
2141 U32 hw_next;
2142 U32 hw_fullspeed_ep;
2143 U32 hw_uframe;
2144 U32 hw_tx_results1;
2145 U32 hw_tx_results2;
2146 U32 hw_tx_results3;
2147 U32 hw_backpointer;
2148 U32 hw_buf_hi [2];
2243 U32 hw_next;
2244 U32 hw_prev;