Lines Matching refs:temp
91 MS_U16 temp; in ms_XBYTE_OR() local
95 temp=*(MS_U16 volatile *)(Addr+(offset-1)*2); in ms_XBYTE_OR()
96 *(MS_U16 volatile *)(Addr+(offset-1)*2)=(((MS_U16)val)<<8) | (temp ); in ms_XBYTE_OR()
100 temp=*(MS_U16 volatile *)(Addr+offset*2); in ms_XBYTE_OR()
101 *(MS_U16 volatile *)(Addr+offset*2)=(temp )|val; in ms_XBYTE_OR()
107 MS_U16 temp; in ms_XBYTE_AND() local
111 temp=*(MS_U16 volatile *)(Addr+(offset-1)*2); in ms_XBYTE_AND()
112 *(MS_U16 volatile *)(Addr+(offset-1)*2)=((((MS_U16)val)<<8)|0xff) & (temp ); in ms_XBYTE_AND()
116 temp=*(MS_U16 volatile *)(Addr+offset*2); in ms_XBYTE_AND()
117 *(MS_U16 volatile *)(Addr+offset*2)=(temp & (0xff00|val) ); in ms_XBYTE_AND()
124 MS_U16 temp; in ms_XBYTE_SET() local
128 temp=*(MS_U16 volatile *)(Addr+(offset-1)*2); in ms_XBYTE_SET()
129 *(MS_U16 volatile *)(Addr+(offset-1)*2)=((temp & 0x00ff) | (((MS_U16)val)<<8)); in ms_XBYTE_SET()
133 temp=*(MS_U16 volatile *)(Addr+offset*2); in ms_XBYTE_SET()
134 *(MS_U16 volatile *)(Addr+offset*2)=((temp & 0xff00) |val ); in ms_XBYTE_SET()
140 MS_U16 temp; in ms_XBYTE_READ() local
145 temp=*(MS_U16 volatile *)(Addr+(offset-1)*2); in ms_XBYTE_READ()
146 uRetVal = (MS_U8) (temp >> 8); in ms_XBYTE_READ()
150 temp=*(MS_U16 volatile *)(Addr+offset*2); in ms_XBYTE_READ()
151 uRetVal = (MS_U8) temp; in ms_XBYTE_READ()
160 U32 temp; in ms_RH_force_FSmode() local
163 temp = hcd_reg_readl((U32)&ehci->op_regs->bus_control); in ms_RH_force_FSmode()
166 temp |= 0x80; //force enter FSmode in ms_RH_force_FSmode()
171 temp &= ~0x80; in ms_RH_force_FSmode()
174 hcd_reg_writel(temp, (U32)&ehci->op_regs->bus_control); in ms_RH_force_FSmode()
596 MS_U32 temp; in xhci_ssport_set_state() local
598 temp = readl((void*)(xhci->xhci_port_addr)); in xhci_ssport_set_state()
599 diag_printf("port status 0x%lx: 0x%lx\n", xhci->xhci_port_addr, temp); in xhci_ssport_set_state()
601 if ((temp & PORT_PLS_MASK) == USB_SS_PORT_LS_SS_DISABLED) { in xhci_ssport_set_state()
603 temp = xhci_port_state_to_neutral(temp); in xhci_ssport_set_state()
604 temp &= ~PORT_PLS_MASK; in xhci_ssport_set_state()
605 temp |= PORT_LINK_STROBE | USB_SS_PORT_LS_RX_DETECT; in xhci_ssport_set_state()
607 writel(temp, (void*)(xhci->xhci_port_addr)); in xhci_ssport_set_state()
610 temp = readl((void*)(xhci->xhci_port_addr)); in xhci_ssport_set_state()
611 diag_printf("port status: 0x%lx\n", temp); in xhci_ssport_set_state()
614 if ((temp & PORT_PLS_MASK) != USB_SS_PORT_LS_SS_DISABLED) { in xhci_ssport_set_state()
616 temp = xhci_port_state_to_neutral(temp); in xhci_ssport_set_state()
617 writel(temp | PORT_PE, (void*)(xhci->xhci_port_addr)); in xhci_ssport_set_state()
620 temp = readl((void*)(xhci->xhci_port_addr)); in xhci_ssport_set_state()
621 diag_printf("port status: 0x%lx\n", temp); in xhci_ssport_set_state()