582             while (!(AEON_REG8(UART_LSR) & UART_LSR_THRE));  in HAL_UART_Aeon_Write()
583             AEON_REG8(UART_TX) = *buf++;  in HAL_UART_Aeon_Write()
599                 if (!(AEON_REG8(UART_LSR) & UART_LSR_THRE))  in HAL_UART_Aeon_Write()
603                 AEON_REG8(UART_TX) = *buf++;  in HAL_UART_Aeon_Write()
655             while (!(AEON_REG8(UART_LSR) & UART_LSR_DR));  in HAL_UART_Aeon_Read()
656             buf[nr_recv++] = AEON_REG8(UART_RX);  in HAL_UART_Aeon_Read()
699             if (AEON_REG8(UART_LSR) & UART_LSR_DR)  in HAL_UART_Aeon_Poll()
716             if (AEON_REG8(UART_LSR) & UART_LSR_THRE)  in HAL_UART_Aeon_Poll()
760     AEON_REG8(UART_LCR) |= UART_LCR_DLAB;  in HAL_UART_Aeon_Set_Baudrate()
761     AEON_REG8(UART_DLL) = divisor & 0xFF;  in HAL_UART_Aeon_Set_Baudrate()
762     AEON_REG8(UART_DLM) = (divisor >> 8) & 0xFF;  in HAL_UART_Aeon_Set_Baudrate()
763     AEON_REG8(UART_LCR) &= ~(UART_LCR_DLAB);  in HAL_UART_Aeon_Set_Baudrate()
778     iir = AEON_REG8(UART_IIR);  in HAL_UART_Aeon_Isr()
784             while (AEON_REG8(UART_LSR) & UART_LSR_DR)  in HAL_UART_Aeon_Isr()
786                 c = AEON_REG8(UART_RX);  in HAL_UART_Aeon_Isr()
816                 while ((AEON_REG8(UART_LSR) & UART_LSR_THRE)  in HAL_UART_Aeon_Isr()
822                         AEON_REG8(UART_TX) = c;  in HAL_UART_Aeon_Isr()
844     iir = AEON_REG8(UART_IIR);  in HAL_UART_Aeon_Isr_HalReg()
850             while (AEON_REG8(UART_LSR) & UART_LSR_DR)  in HAL_UART_Aeon_Isr_HalReg()
852                 c = AEON_REG8(UART_RX);  in HAL_UART_Aeon_Isr_HalReg()
882                 while ((AEON_REG8(UART_LSR) & UART_LSR_THRE)  in HAL_UART_Aeon_Isr_HalReg()
888                         AEON_REG8(UART_TX) = c;  in HAL_UART_Aeon_Isr_HalReg()
907         AEON_REG8(UART_IER) |= UART_IER_RDI;  in HAL_UART_Aeon_Set_Rx_Callback()
918         AEON_REG8(UART_IER) &= ~UART_IER_RDI;  in HAL_UART_Aeon_Set_Rx_Callback()
932         AEON_REG8(UART_IER) |= UART_IER_RDI;  in HAL_UART_Aeon_Set_Rx_Callback_HalReg()
943         AEON_REG8(UART_IER) &= ~UART_IER_RDI;  in HAL_UART_Aeon_Set_Rx_Callback_HalReg()
983         AEON_REG8(UART_IER) = 0;  in HAL_UART_Aeon_Open()
986 …AEON_REG8(UART_FCR) = UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT | UART_FCR_…  in HAL_UART_Aeon_Open()
989         AEON_REG8(UART_IER) = 0;  in HAL_UART_Aeon_Open()
992         AEON_REG8(UART_LCR) = UART_LCR_WLEN8 & ~(UART_LCR_STOP2 | UART_LCR_PARITY);  in HAL_UART_Aeon_Open()