Lines Matching refs:Dma_Ctrl

195     Reg_AESDMA = (MS_VIRT)(&_AESDMACtrl[0].Dma_Ctrl);  in AESDMA_Reset()
197     REG32_W((&_AESDMACtrl[0].Dma_Ctrl) , 0x00000000); // clear ctrl register  in AESDMA_Reset()
198 …REG32_W((&_AESDMACtrl[0].Dma_Ctrl) , _AESDMA_REG32_R(&_AESDMACtrl[0].Dma_Ctrl)|(AESDMA_CTRL_SW_RST…  in AESDMA_Reset()
199 …REG32_W((&_AESDMACtrl[0].Dma_Ctrl) , _AESDMA_REG32_R(&_AESDMACtrl[0].Dma_Ctrl)&~(AESDMA_CTRL_SW_RS…  in AESDMA_Reset()
258 …REG32_W((&_AESDMACtrl[0].Dma_Ctrl), (_AESDMA_REG32_R(&_AESDMACtrl[0].Dma_Ctrl) &~ AESDMA_CTRL_FILE…  in AESDMA_Start()
259 …REG32_W((&_AESDMACtrl[0].Dma_Ctrl), (_AESDMA_REG32_R(&_AESDMACtrl[0].Dma_Ctrl) | AESDMA_CTRL_FILEO…  in AESDMA_Start()
263 …REG32_W((&_AESDMACtrl[0].Dma_Ctrl) , _AESDMA_REG32_R(&_AESDMACtrl[0].Dma_Ctrl)&~(AESDMA_CTRL_FILEO…  in AESDMA_Start()
284 …REG32_W((&_AESDMACtrl[0].Dma_Ctrl) , _AESDMA_REG32_R(&_AESDMACtrl[0].Dma_Ctrl)|(u32PSin|u32PSout));  in AESDMA_Set_PS_ENG()
299 …REG32_W((&_AESDMACtrl[0].Dma_Ctrl), _AESDMA_REG32_R(&_AESDMACtrl[0].Dma_Ctrl)|AESDMA_ENG_PS_RELEAS…  in AESDMA_Set_PS_Release()
300 …REG32_W((&_AESDMACtrl[0].Dma_Ctrl), _AESDMA_REG32_R(&_AESDMACtrl[0].Dma_Ctrl) & ~AESDMA_ENG_PS_REL…  in AESDMA_Set_PS_Release()
386 …REG32_W((&_AESDMACtrl[0].Dma_Ctrl),(( _AESDMA_REG32_R(&_AESDMACtrl[0].Dma_Ctrl) & (~DmaCtrlSet)) |…  in AESDMA_Set_CIPHER_ENG()
466 …REG32_W((&_AESDMACtrl[0].Dma_Ctrl) , _AESDMA_REG32_R(&_AESDMACtrl[0].Dma_Ctrl)|AESDMA_ECO_FIX_LAST…  in AESDMA_HW_Patch()
1222     Reg_AESDMA = (MS_VIRT)(&_AESDMACtrl[0].Dma_Ctrl);  in AESDMA_NormalReset()
1224     REG32_W((&_AESDMACtrl[0].Dma_Ctrl) , 0x00000000); // clear ctrl register  in AESDMA_NormalReset()