Lines Matching defs:addr
126 #define UART1_READ(addr) READ_BYTE(RIU_BUS_BASE + ((REG_SC_BASE1 + ((addr) << 1)) << 1)) argument
127 #define UART2_READ(addr) READ_BYTE(RIU_BUS_BASE + ((REG_SC_BASE2 + ((addr) << 1)) << 1)) argument
129 #define UART1_WRITE(addr, val) WRITE_BYTE(RIU_BUS_BASE + ((REG_SC_BASE1 + ((addr) << 1… argument
130 #define UART2_WRITE(addr, val) WRITE_BYTE(RIU_BUS_BASE + ((REG_SC_BASE2 + ((addr) << 1)) << 1)… argument
132 #define UART1_READ(addr) READ_BYTE(REG_SC_BASE1 + ((addr) << 2)) argument
133 #define UART2_READ(addr) READ_BYTE(REG_SC_BASE2 + ((addr) << 2)) argument
135 #define UART1_WRITE(addr, val) WRITE_BYTE((REG_SC_BASE1 + ((addr) << 2)), (val)) argument
136 #define UART2_WRITE(addr, val) WRITE_BYTE((REG_SC_BASE2 + ((addr) << 2)), (val)) argument
140 #define UART1_OR(addr, val) UART1_WRITE(addr, UART1_READ(addr) | (val)) argument
141 #define UART1_AND(addr, val) UART1_WRITE(addr, UART1_READ(addr) & (val)) argument
142 #define UART1_XOR(addr, val) UART1_WRITE(addr, UART1_READ(addr) ^ (val)) argument
143 #define UART2_OR(addr, val) UART2_WRITE(addr, UART2_READ(addr) | (val)) argument
144 #define UART2_AND(addr, val) UART2_WRITE(addr, UART2_READ(addr) & (val)) argument
145 #define UART2_XOR(addr, val) UART2_WRITE(addr, UART2_READ(addr) ^ (val)) argument
372 #define HW_READ(addr) READ_WORD((RIU_BUS_BASE + ((addr) << 1))) argument
373 #define HW_WRITE(addr, val) WRITE_WORD((RIU_BUS_BASE + ((addr) << 1)), (val)) argument
375 #define HW_READ(addr) (*(volatile MS_U16*)(RIU_BUS_BASE + ((addr) << 1))) argument
376 #define HW_WRITE(addr, val) { (*((volatile MS_U16*)(RIU_BUS_BASE + ((addr) << 1))))… argument
380 #define HW_READ(addr) READ_WORD((RIU_BUS_BASE + ((addr-0x100000UL) << 1))) argument
381 #define HW_WRITE(addr, val) WRITE_WORD((RIU_BUS_BASE + ((addr-0x100000UL) << 1)), (… argument
383 #define HW_READ(addr) (*(volatile MS_U16*)(RIU_BUS_BASE + ((addr-0x100000UL) … argument
384 #define HW_WRITE(addr, val) { (*((volatile MS_U16*)(RIU_BUS_BASE + ((addr-0x100000U… argument