curry/njpd_ex/regNJPD.h

129 #define BK_NJPD1_GLOBAL_SETTING00                    (NJPD1_REG_BASE+NJPD_OFFSET(0x00))
130 #define BK_NJPD1_GLOBAL_SETTING01                    (NJPD1_REG_BASE+NJPD_OFFSET(0x01))
131 #define BK_NJPD1_GLOBAL_SETTING02                    (NJPD1_REG_BASE+NJPD_OFFSET(0x02))
134 #define BK_NJPD1_PITCH_WIDTH                         (NJPD1_REG_BASE+NJPD_OFFSET(0x03))
137 #define BK_NJPD1_RESTART_INTERVAL                    (NJPD1_REG_BASE+NJPD_OFFSET(0x05))
140 #define BK_NJPD1_IMG_HSIZE                           (NJPD1_REG_BASE+NJPD_OFFSET(0x06))
141 #define BK_NJPD1_IMG_VSIZE                           (NJPD1_REG_BASE+NJPD_OFFSET(0x07))
144 #define BK_NJPD1_WRITE_ONE_CLEAR                     (NJPD1_REG_BASE+NJPD_OFFSET(0x08))
147 #define BK_NJPD1_ROI_H_START                         (NJPD1_REG_BASE+NJPD_OFFSET(0x09))
148 #define BK_NJPD1_ROI_V_START                         (NJPD1_REG_BASE+NJPD_OFFSET(0x0a))
149 #define BK_NJPD1_ROI_H_SIZE                          (NJPD1_REG_BASE+NJPD_OFFSET(0x0b))
150 #define BK_NJPD1_ROI_V_SIZE                          (NJPD1_REG_BASE+NJPD_OFFSET(0x0c))
153 #define BK_NJPD1_GATED_CLOCK_CTRL                    (NJPD1_REG_BASE+NJPD_OFFSET(0x0d))
156 #define BK_NJPD1_MIU_READ_STATUS                     (NJPD1_REG_BASE+NJPD_OFFSET(0x0e))
157 #define BK_NJPD1_MIU_IBUFFER_CNT                     (NJPD1_REG_BASE+NJPD_OFFSET(0x0f))
158 #define BK_NJPD1_MIU_READ_START_ADDR_L               (NJPD1_REG_BASE+NJPD_OFFSET(0x10))
159 #define BK_NJPD1_MIU_READ_START_ADDR_H               (NJPD1_REG_BASE+NJPD_OFFSET(0x11))
160 #define BK_NJPD1_MIU_READ_BUFFER0_START_ADDR_L       (NJPD1_REG_BASE+NJPD_OFFSET(0x12))
161 #define BK_NJPD1_MIU_READ_BUFFER0_START_ADDR_H       (NJPD1_REG_BASE+NJPD_OFFSET(0x13))
162 #define BK_NJPD1_MIU_READ_BUFFER0_END_ADDR_L         (NJPD1_REG_BASE+NJPD_OFFSET(0x14))
163 #define BK_NJPD1_MIU_READ_BUFFER0_END_ADDR_H         (NJPD1_REG_BASE+NJPD_OFFSET(0x15))
164 #define BK_NJPD1_MIU_READ_BUFFER1_START_ADDR_L       (NJPD1_REG_BASE+NJPD_OFFSET(0x16))
165 #define BK_NJPD1_MIU_READ_BUFFER1_START_ADDR_H       (NJPD1_REG_BASE+NJPD_OFFSET(0x17))
166 #define BK_NJPD1_MIU_READ_BUFFER1_END_ADDR_L         (NJPD1_REG_BASE+NJPD_OFFSET(0x18))
167 #define BK_NJPD1_MIU_READ_BUFFER1_END_ADDR_H         (NJPD1_REG_BASE+NJPD_OFFSET(0x19))
168 #define BK_NJPD1_MIU_WRITE_START_ADDR_L              (NJPD1_REG_BASE+NJPD_OFFSET(0x1a))
169 #define BK_NJPD1_MIU_WRITE_START_ADDR_H              (NJPD1_REG_BASE+NJPD_OFFSET(0x1b))
170 #define BK_NJPD1_MIU_WRITE_POINTER_ADDR_L            (NJPD1_REG_BASE+NJPD_OFFSET(0x1c))
171 #define BK_NJPD1_MIU_WRITE_POINTER_ADDR_H            (NJPD1_REG_BASE+NJPD_OFFSET(0x1d))
172 #define BK_NJPD1_MIU_READ_POINTER_ADDR_L             (NJPD1_REG_BASE+NJPD_OFFSET(0x1e))
173 #define BK_NJPD1_MIU_READ_POINTER_ADDR_H             (NJPD1_REG_BASE+NJPD_OFFSET(0x1f))
174 #define BK_NJPD1_MIU_HTABLE_START_ADDR_L             (NJPD1_REG_BASE+NJPD_OFFSET(0x20))
175 #define BK_NJPD1_MIU_HTABLE_START_ADDR_H             (NJPD1_REG_BASE+NJPD_OFFSET(0x21))
176 #define BK_NJPD1_MIU_GTABLE_START_ADDR_L             (NJPD1_REG_BASE+NJPD_OFFSET(0x22))
177 #define BK_NJPD1_MIU_GTABLE_START_ADDR_H             (NJPD1_REG_BASE+NJPD_OFFSET(0x23))
178 #define BK_NJPD1_MIU_QTABLE_START_ADDR_L             (NJPD1_REG_BASE+NJPD_OFFSET(0x24))
179 #define BK_NJPD1_MIU_QTABLE_START_ADDR_H             (NJPD1_REG_BASE+NJPD_OFFSET(0x25))
180 #define BK_NJPD1_MIU_HTABLE_SIZE                     (NJPD1_REG_BASE+NJPD_OFFSET(0x26))
181 #define BK_NJPD1_SET_CHROMA_VALUE                    (NJPD1_REG_BASE+NJPD_OFFSET(0x27))
182 #define BK_NJPD1_IBUF_READ_LENGTH                    (NJPD1_REG_BASE+NJPD_OFFSET(0x28))
186 #define BK_NJPD1_IRQ_CLEAR                           (NJPD1_REG_BASE+NJPD_OFFSET(0x29))
187 #define BK_NJPD1_IRQ_FORCE                           (NJPD1_REG_BASE+NJPD_OFFSET(0x2a))
188 #define BK_NJPD1_IRQ_MASK                            (NJPD1_REG_BASE+NJPD_OFFSET(0x2b))
189 #define BK_NJPD1_IRQ_FINAL_S                         (NJPD1_REG_BASE+NJPD_OFFSET(0x2c))
190 #define BK_NJPD1_IRQ_RAW_S                           (NJPD1_REG_BASE+NJPD_OFFSET(0x2d))
193 #define BK_NJPD1_MIU_TLB                             (NJPD1_REG_BASE+NJPD_OFFSET(0x2f)+1)
196 #define BK_NJPD1_ROW_IDEX                            (NJPD1_REG_BASE+NJPD_OFFSET(0x30))
197 #define BK_NJPD1_COLUMN_IDEX                         (NJPD1_REG_BASE+NJPD_OFFSET(0x31))
198 #define BK_NJPD1_DEBUG_BUS_SELECT                    (NJPD1_REG_BASE+NJPD_OFFSET(0x32))
199 #define BK_NJPD1_DEBUG_BUS_H                         (NJPD1_REG_BASE+NJPD_OFFSET(0x33))
200 #define BK_NJPD1_DEBUG_BUS_L                         (NJPD1_REG_BASE+NJPD_OFFSET(0x34))
201 #define BK_NJPD1_IBUF_BYTE_COUNT_L                   (NJPD1_REG_BASE+NJPD_OFFSET(0x35))
202 #define BK_NJPD1_IBUF_BYTE_COUNT_H                   (NJPD1_REG_BASE+NJPD_OFFSET(0x36))
203 #define BK_NJPD1_VLD_BYTE_COUNT_L                    (NJPD1_REG_BASE+NJPD_OFFSET(0x37))
204 #define BK_NJPD1_VLD_BYTE_COUNT_H                    (NJPD1_REG_BASE+NJPD_OFFSET(0x38))
205 #define BK_NJPD1_VLD_DECODING_DATA_L                 (NJPD1_REG_BASE+NJPD_OFFSET(0x39))
206 #define BK_NJPD1_VLD_DECODING_DATA_H                 (NJPD1_REG_BASE+NJPD_OFFSET(0x3a))
207 #define BK_NJPD1_DEBUG_TRIG_CYCLE                    (NJPD1_REG_BASE+NJPD_OFFSET(0x3b))
208 #define BK_NJPD1_DEBUG_TRIG_MBX                      (NJPD1_REG_BASE+NJPD_OFFSET(0x3c))
209 #define BK_NJPD1_DEBUG_TRIG_MBY                      (NJPD1_REG_BASE+NJPD_OFFSET(0x3d))
210 #define BK_NJPD1_DEBUG_TRIGGER                       (NJPD1_REG_BASE+NJPD_OFFSET(0x3e))
214 #define BK_NJPD1_BIST_FAIL                           (NJPD1_REG_BASE+NJPD_OFFSET(0x3f))
218 #define BK_NJPD1_TBC                                 (NJPD1_REG_BASE+NJPD_OFFSET(0x40))
219 #define BK_NJPD1_TBC_WDATA0                          (NJPD1_REG_BASE+NJPD_OFFSET(0x41))
220 #define BK_NJPD1_TBC_WDATA1                          (NJPD1_REG_BASE+NJPD_OFFSET(0x42))
221 #define BK_NJPD1_TBC_RDATA_L                         (NJPD1_REG_BASE+NJPD_OFFSET(0x43))
222 #define BK_NJPD1_TBC_RDATA_H                         (NJPD1_REG_BASE+NJPD_OFFSET(0x44))
226 #define BK_NJPD1_Y_MAX_HUFFTABLE_ADDRESS             (NJPD1_REG_BASE+NJPD_OFFSET(0x45))
227 #define BK_NJPD1_CB_MAX_HUFFTABLE_ADDRESS            (NJPD1_REG_BASE+NJPD_OFFSET(0x46))
228 #define BK_NJPD1_CR_MAX_HUFFTABLE_ADDRESS            (NJPD1_REG_BASE+NJPD_OFFSET(0x47))
232 #define BK_NJPD1_SPARE00                             (NJPD1_REG_BASE+NJPD_OFFSET(0x48))
233 #define BK_NJPD1_SPARE01                             (NJPD1_REG_BASE+NJPD_OFFSET(0x49))
234 #define BK_NJPD1_SPARE02                             (NJPD1_REG_BASE+NJPD_OFFSET(0x4a))
235 #define BK_NJPD1_SPARE03                             (NJPD1_REG_BASE+NJPD_OFFSET(0x4b))
236 #define BK_NJPD1_SPARE04                             (NJPD1_REG_BASE+NJPD_OFFSET(0x4c))
237 #define BK_NJPD1_SPARE05                             (NJPD1_REG_BASE+NJPD_OFFSET(0x4d))
238 #define BK_NJPD1_SPARE06                             (NJPD1_REG_BASE+NJPD_OFFSET(0x4e))
239 #define BK_NJPD1_SPARE07                             (NJPD1_REG_BASE+NJPD_OFFSET(0x4f))
241 #define BK_NJPD1_SPARE07                             (NJPD1_REG_BASE+NJPD_OFFSET(0x4f))
243 #define BK_NJPD1_MARB_SETTING_00                     (NJPD1_REG_BASE+NJPD_OFFSET(0x50))
244 #define BK_NJPD1_MARB_SETTING_01                     (NJPD1_REG_BASE+NJPD_OFFSET(0x51))
245 #define BK_NJPD1_MARB_SETTING_02                     (NJPD1_REG_BASE+NJPD_OFFSET(0x52))
246 #define BK_NJPD1_MARB_SETTING_03                     (NJPD1_REG_BASE+NJPD_OFFSET(0x53))
247 #define BK_NJPD1_MARB_SETTING_04                     (NJPD1_REG_BASE+NJPD_OFFSET(0x54))
248 #define BK_NJPD1_MARB_SETTING_05                     (NJPD1_REG_BASE+NJPD_OFFSET(0x55))
249 #define BK_NJPD1_MARB_SETTING_06                     (NJPD1_REG_BASE+NJPD_OFFSET(0x56))
250 #define BK_NJPD1_MARB_SETTING_07                     (NJPD1_REG_BASE+NJPD_OFFSET(0x57))
252 #define BK_NJPD1_MARB_UBOUND_0_L                     (NJPD1_REG_BASE+NJPD_OFFSET(0x58))
253 #define BK_NJPD1_MARB_UBOUND_0_H                     (NJPD1_REG_BASE+NJPD_OFFSET(0x59))
254 #define BK_NJPD1_MARB_LBOUND_0_L                     (NJPD1_REG_BASE+NJPD_OFFSET(0x5a))
255 #define BK_NJPD1_MARB_LBOUND_0_H                     (NJPD1_REG_BASE+NJPD_OFFSET(0x5b))
258 #define BK_NJPD1_CRC_MODE                            (NJPD1_REG_BASE+NJPD_OFFSET(0x6d))
264 #define BK_NJPD1_MARB_CRC_RESULT_0                   (NJPD1_REG_BASE+NJPD_OFFSET(0x70))
265 #define BK_NJPD1_MARB_CRC_RESULT_1                   (NJPD1_REG_BASE+NJPD_OFFSET(0x71))
266 #define BK_NJPD1_MARB_CRC_RESULT_2                   (NJPD1_REG_BASE+NJPD_OFFSET(0x72))
267 #define BK_NJPD1_MARB_CRC_RESULT_3                   (NJPD1_REG_BASE+NJPD_OFFSET(0x73))
268 #define BK_NJPD1_MARB_RESET                          (NJPD1_REG_BASE+NJPD_OFFSET(0x74))
269 #define BK_NJPD1_HANDSHAKE_CNT                       (NJPD1_REG_BASE+NJPD_OFFSET(0x74)+1)
270 #define BK_NJPD1_SW_MB_ROW_CNT                       (NJPD1_REG_BASE+NJPD_OFFSET(0x75))
271 #define BK_NJPD1_HANDSHAKE                           (NJPD1_REG_BASE+NJPD_OFFSET(0x75)+1)
272 #define BK_NJPD1_TOP_MARB_PORT_ENABLE                (NJPD1_REG_BASE+NJPD_OFFSET(0x76))
274 #define BK_NJPD1_GENERAL(x)                          (NJPD1_REG_BASE+NJPD_OFFSET(x))
281 #define BK_NJPD2_GLOBAL_SETTING00                    (NJPD2_REG_BASE+NJPD_OFFSET(0x00))
282 #define BK_NJPD2_GLOBAL_SETTING01                    (NJPD2_REG_BASE+NJPD_OFFSET(0x01))
283 #define BK_NJPD2_GLOBAL_SETTING02                    (NJPD2_REG_BASE+NJPD_OFFSET(0x02))
286 #define BK_NJPD2_PITCH_WIDTH                         (NJPD2_REG_BASE+NJPD_OFFSET(0x03))
289 #define BK_NJPD2_RESTART_INTERVAL                    (NJPD2_REG_BASE+NJPD_OFFSET(0x05))
292 #define BK_NJPD2_IMG_HSIZE                           (NJPD2_REG_BASE+NJPD_OFFSET(0x06))
293 #define BK_NJPD2_IMG_VSIZE                           (NJPD2_REG_BASE+NJPD_OFFSET(0x07))
296 #define BK_NJPD2_WRITE_ONE_CLEAR                     (NJPD2_REG_BASE+NJPD_OFFSET(0x08))
299 #define BK_NJPD2_ROI_H_START                         (NJPD2_REG_BASE+NJPD_OFFSET(0x09))
300 #define BK_NJPD2_ROI_V_START                         (NJPD2_REG_BASE+NJPD_OFFSET(0x0a))
301 #define BK_NJPD2_ROI_H_SIZE                          (NJPD2_REG_BASE+NJPD_OFFSET(0x0b))
302 #define BK_NJPD2_ROI_V_SIZE                          (NJPD2_REG_BASE+NJPD_OFFSET(0x0c))
305 #define BK_NJPD2_GATED_CLOCK_CTRL                    (NJPD2_REG_BASE+NJPD_OFFSET(0x0d))
308 #define BK_NJPD2_MIU_READ_STATUS                     (NJPD2_REG_BASE+NJPD_OFFSET(0x0e))
309 #define BK_NJPD2_MIU_IBUFFER_CNT                     (NJPD2_REG_BASE+NJPD_OFFSET(0x0f))
310 #define BK_NJPD2_MIU_READ_START_ADDR_L               (NJPD2_REG_BASE+NJPD_OFFSET(0x10))
311 #define BK_NJPD2_MIU_READ_START_ADDR_H               (NJPD2_REG_BASE+NJPD_OFFSET(0x11))
312 #define BK_NJPD2_MIU_READ_BUFFER0_START_ADDR_L       (NJPD2_REG_BASE+NJPD_OFFSET(0x12))
313 #define BK_NJPD2_MIU_READ_BUFFER0_START_ADDR_H       (NJPD2_REG_BASE+NJPD_OFFSET(0x13))
314 #define BK_NJPD2_MIU_READ_BUFFER0_END_ADDR_L         (NJPD2_REG_BASE+NJPD_OFFSET(0x14))
315 #define BK_NJPD2_MIU_READ_BUFFER0_END_ADDR_H         (NJPD2_REG_BASE+NJPD_OFFSET(0x15))
316 #define BK_NJPD2_MIU_READ_BUFFER1_START_ADDR_L       (NJPD2_REG_BASE+NJPD_OFFSET(0x16))
317 #define BK_NJPD2_MIU_READ_BUFFER1_START_ADDR_H       (NJPD2_REG_BASE+NJPD_OFFSET(0x17))
318 #define BK_NJPD2_MIU_READ_BUFFER1_END_ADDR_L         (NJPD2_REG_BASE+NJPD_OFFSET(0x18))
319 #define BK_NJPD2_MIU_READ_BUFFER1_END_ADDR_H         (NJPD2_REG_BASE+NJPD_OFFSET(0x19))
320 #define BK_NJPD2_MIU_WRITE_START_ADDR_L              (NJPD2_REG_BASE+NJPD_OFFSET(0x1a))
321 #define BK_NJPD2_MIU_WRITE_START_ADDR_H              (NJPD2_REG_BASE+NJPD_OFFSET(0x1b))
322 #define BK_NJPD2_MIU_WRITE_POINTER_ADDR_L            (NJPD2_REG_BASE+NJPD_OFFSET(0x1c))
323 #define BK_NJPD2_MIU_WRITE_POINTER_ADDR_H            (NJPD2_REG_BASE+NJPD_OFFSET(0x1d))
324 #define BK_NJPD2_MIU_READ_POINTER_ADDR_L             (NJPD2_REG_BASE+NJPD_OFFSET(0x1e))
325 #define BK_NJPD2_MIU_READ_POINTER_ADDR_H             (NJPD2_REG_BASE+NJPD_OFFSET(0x1f))
326 #define BK_NJPD2_MIU_HTABLE_START_ADDR_L             (NJPD2_REG_BASE+NJPD_OFFSET(0x20))
327 #define BK_NJPD2_MIU_HTABLE_START_ADDR_H             (NJPD2_REG_BASE+NJPD_OFFSET(0x21))
328 #define BK_NJPD2_MIU_GTABLE_START_ADDR_L             (NJPD2_REG_BASE+NJPD_OFFSET(0x22))
329 #define BK_NJPD2_MIU_GTABLE_START_ADDR_H             (NJPD2_REG_BASE+NJPD_OFFSET(0x23))
330 #define BK_NJPD2_MIU_QTABLE_START_ADDR_L             (NJPD2_REG_BASE+NJPD_OFFSET(0x24))
331 #define BK_NJPD2_MIU_QTABLE_START_ADDR_H             (NJPD2_REG_BASE+NJPD_OFFSET(0x25))
332 #define BK_NJPD2_MIU_HTABLE_SIZE                     (NJPD2_REG_BASE+NJPD_OFFSET(0x26))
333 #define BK_NJPD2_SET_CHROMA_VALUE                    (NJPD2_REG_BASE+NJPD_OFFSET(0x27))
334 #define BK_NJPD2_IBUF_READ_LENGTH                    (NJPD2_REG_BASE+NJPD_OFFSET(0x28))
338 #define BK_NJPD2_IRQ_CLEAR                           (NJPD2_REG_BASE+NJPD_OFFSET(0x29))
339 #define BK_NJPD2_IRQ_FORCE                           (NJPD2_REG_BASE+NJPD_OFFSET(0x2a))
340 #define BK_NJPD2_IRQ_MASK                            (NJPD2_REG_BASE+NJPD_OFFSET(0x2b))
341 #define BK_NJPD2_IRQ_FINAL_S                         (NJPD2_REG_BASE+NJPD_OFFSET(0x2c))
342 #define BK_NJPD2_IRQ_RAW_S                           (NJPD2_REG_BASE+NJPD_OFFSET(0x2d))
345 #define BK_NJPD2_MIU_TLB                             (NJPD2_REG_BASE+NJPD_OFFSET(0x2f)+1)
349 #define BK_NJPD2_ROW_IDEX                            (NJPD2_REG_BASE+NJPD_OFFSET(0x30))
350 #define BK_NJPD2_COLUMN_IDEX                         (NJPD2_REG_BASE+NJPD_OFFSET(0x31))
351 #define BK_NJPD2_DEBUG_BUS_SELECT                    (NJPD2_REG_BASE+NJPD_OFFSET(0x32))
352 #define BK_NJPD2_DEBUG_BUS_H                         (NJPD2_REG_BASE+NJPD_OFFSET(0x33))
353 #define BK_NJPD2_DEBUG_BUS_L                         (NJPD2_REG_BASE+NJPD_OFFSET(0x34))
354 #define BK_NJPD2_IBUF_BYTE_COUNT_L                   (NJPD2_REG_BASE+NJPD_OFFSET(0x35))
355 #define BK_NJPD2_IBUF_BYTE_COUNT_H                   (NJPD2_REG_BASE+NJPD_OFFSET(0x36))
356 #define BK_NJPD2_VLD_BYTE_COUNT_L                    (NJPD2_REG_BASE+NJPD_OFFSET(0x37))
357 #define BK_NJPD2_VLD_BYTE_COUNT_H                    (NJPD2_REG_BASE+NJPD_OFFSET(0x38))
358 #define BK_NJPD2_VLD_DECODING_DATA_L                 (NJPD2_REG_BASE+NJPD_OFFSET(0x39))
359 #define BK_NJPD2_VLD_DECODING_DATA_H                 (NJPD2_REG_BASE+NJPD_OFFSET(0x3a))
360 #define BK_NJPD2_DEBUG_TRIG_CYCLE                    (NJPD2_REG_BASE+NJPD_OFFSET(0x3b))
361 #define BK_NJPD2_DEBUG_TRIG_MBX                      (NJPD2_REG_BASE+NJPD_OFFSET(0x3c))
362 #define BK_NJPD2_DEBUG_TRIG_MBY                      (NJPD2_REG_BASE+NJPD_OFFSET(0x3d))
363 #define BK_NJPD2_DEBUG_TRIGGER                       (NJPD2_REG_BASE+NJPD_OFFSET(0x3e))
367 #define BK_NJPD2_BIST_FAIL                           (NJPD2_REG_BASE+NJPD_OFFSET(0x3f))
371 #define BK_NJPD2_TBC                                 (NJPD2_REG_BASE+NJPD_OFFSET(0x40))
372 #define BK_NJPD2_TBC_WDATA0                          (NJPD2_REG_BASE+NJPD_OFFSET(0x41))
373 #define BK_NJPD2_TBC_WDATA1                          (NJPD2_REG_BASE+NJPD_OFFSET(0x42))
374 #define BK_NJPD2_TBC_RDATA_L                         (NJPD2_REG_BASE+NJPD_OFFSET(0x43))
375 #define BK_NJPD2_TBC_RDATA_H                         (NJPD2_REG_BASE+NJPD_OFFSET(0x44))
379 #define BK_NJPD2_Y_MAX_HUFFTABLE_ADDRESS             (NJPD2_REG_BASE+NJPD_OFFSET(0x45))
380 #define BK_NJPD2_CB_MAX_HUFFTABLE_ADDRESS            (NJPD2_REG_BASE+NJPD_OFFSET(0x46))
381 #define BK_NJPD2_CR_MAX_HUFFTABLE_ADDRESS            (NJPD2_REG_BASE+NJPD_OFFSET(0x47))
385 #define BK_NJPD2_SPARE00                             (NJPD2_REG_BASE+NJPD_OFFSET(0x48))
386 #define BK_NJPD2_SPARE01                             (NJPD2_REG_BASE+NJPD_OFFSET(0x49))
387 #define BK_NJPD2_SPARE02                             (NJPD2_REG_BASE+NJPD_OFFSET(0x4a))
388 #define BK_NJPD2_SPARE03                             (NJPD2_REG_BASE+NJPD_OFFSET(0x4b))
389 #define BK_NJPD2_SPARE04                             (NJPD2_REG_BASE+NJPD_OFFSET(0x4c))
390 #define BK_NJPD2_SPARE05                             (NJPD2_REG_BASE+NJPD_OFFSET(0x4d))
391 #define BK_NJPD2_SPARE06                             (NJPD2_REG_BASE+NJPD_OFFSET(0x4e))
392 #define BK_NJPD2_SPARE07                             (NJPD2_REG_BASE+NJPD_OFFSET(0x4f))
394 #define BK_NJPD2_SPARE07                             (NJPD2_REG_BASE+NJPD_OFFSET(0x4f))
396 #define BK_NJPD2_MARB_SETTING_00                     (NJPD2_REG_BASE+NJPD_OFFSET(0x50))
397 #define BK_NJPD2_MARB_SETTING_01                     (NJPD2_REG_BASE+NJPD_OFFSET(0x51))
398 #define BK_NJPD2_MARB_SETTING_02                     (NJPD2_REG_BASE+NJPD_OFFSET(0x52))
399 #define BK_NJPD2_MARB_SETTING_03                     (NJPD2_REG_BASE+NJPD_OFFSET(0x53))
400 #define BK_NJPD2_MARB_SETTING_04                     (NJPD2_REG_BASE+NJPD_OFFSET(0x54))
401 #define BK_NJPD2_MARB_SETTING_05                     (NJPD2_REG_BASE+NJPD_OFFSET(0x55))
402 #define BK_NJPD2_MARB_SETTING_06                     (NJPD2_REG_BASE+NJPD_OFFSET(0x56))
403 #define BK_NJPD2_MARB_SETTING_07                     (NJPD2_REG_BASE+NJPD_OFFSET(0x57))
405 #define BK_NJPD2_MARB_UBOUND_0_L                     (NJPD2_REG_BASE+NJPD_OFFSET(0x58))
406 #define BK_NJPD2_MARB_UBOUND_0_H                     (NJPD2_REG_BASE+NJPD_OFFSET(0x59))
407 #define BK_NJPD2_MARB_LBOUND_0_L                     (NJPD2_REG_BASE+NJPD_OFFSET(0x5a))
408 #define BK_NJPD2_MARB_LBOUND_0_H                     (NJPD2_REG_BASE+NJPD_OFFSET(0x5b))
411 #define BK_NJPD2_CRC_MODE                            (NJPD2_REG_BASE+NJPD_OFFSET(0x6d))
417 #define BK_NJPD2_MARB_CRC_RESULT_0                   (NJPD2_REG_BASE+NJPD_OFFSET(0x70))
418 #define BK_NJPD2_MARB_CRC_RESULT_1                   (NJPD2_REG_BASE+NJPD_OFFSET(0x71))
419 #define BK_NJPD2_MARB_CRC_RESULT_2                   (NJPD2_REG_BASE+NJPD_OFFSET(0x72))
420 #define BK_NJPD2_MARB_CRC_RESULT_3                   (NJPD2_REG_BASE+NJPD_OFFSET(0x73))
421 #define BK_NJPD2_MARB_RESET                          (NJPD2_REG_BASE+NJPD_OFFSET(0x74))
422 #define BK_NJPD2_HANDSHAKE_CNT                       (NJPD2_REG_BASE+NJPD_OFFSET(0x74)+1)
423 #define BK_NJPD2_SW_MB_ROW_CNT                       (NJPD2_REG_BASE+NJPD_OFFSET(0x75))
424 #define BK_NJPD2_HANDSHAKE                           (NJPD2_REG_BASE+NJPD_OFFSET(0x75)+1)
425 #define BK_NJPD2_TOP_MARB_PORT_ENABLE                (NJPD2_REG_BASE+NJPD_OFFSET(0x76))
427 #define BK_NJPD2_GENERAL(x)                          (NJPD2_REG_BASE+NJPD_OFFSET(x))
429 #define BK_MIU0_GENERAL(x)          (NJPD_MIU0_BASE+NJPD_OFFSET(x))
430 #define BK_MIU1_GENERAL(x)          (NJPD_MIU1_BASE+NJPD_OFFSET(x))
436 #define NJPD_CLOCK                                  (NJPD_CLKGEN2_BASE+NJPD_OFFSET(0x11))     // Cu…
452 #define NJPD_MIU0_RQ2_MASK              (NJPD_MIU0_BASE+NJPD_OFFSET(0x43))
453 #define NJPD_MIU1_RQ2_MASK              (NJPD_MIU1_BASE+NJPD_OFFSET(0x43))
456 #define NJPD0_MIU0_MIU_SEL2             (NJPD_MIU0_BASE+NJPD_OFFSET(0x7a))
457 #define NJPD0_MIU1_MIU_SEL2             (NJPD_MIU1_BASE+NJPD_OFFSET(0x7a))
465 #define BK_1608_GENERAL(x)          (NJPD_1608_BASE+NJPD_OFFSET(x))
466 #define BK_160F_GENERAL(x)          (NJPD_160F_BASE+NJPD_OFFSET(x))
467 #define BK_1615_GENERAL(x)          (NJPD_1615_BASE+NJPD_OFFSET(x))
472 #define REG_TSP_CTRL                    (NJPD_TSP_BASE + NJPD_OFFSET(0x7A))
475 #define REG_TSP_STC_L                   (NJPD_TSP_BASE + NJPD_OFFSET(0x30))
476 #define REG_TSP_STC_H                   (NJPD_TSP_BASE + NJPD_OFFSET(0x31))
482 #define NJPD_MIU_GROUP2_I64             (NJPD_CHIPTOP_BASE + NJPD_OFFSET(0x42))
487 #define NJPD_NONPM_SECURE_20            (NJPD_TZPC_NONPM_BASE + NJPD_OFFSET(0x20))
488 #define NJPD_NONPM_SECURE_21            (NJPD_TZPC_NONPM_BASE + NJPD_OFFSET(0x21))
489 #define NJPD_NONPM_SECURE_22            (NJPD_TZPC_NONPM_BASE + NJPD_OFFSET(0x22))
490 #define NJPD_NONPM_SECURE_23            (NJPD_TZPC_NONPM_BASE + NJPD_OFFSET(0x23))
491 #define NJPD_NONPM_SECURE_24            (NJPD_TZPC_NONPM_BASE + NJPD_OFFSET(0x24))
492 #define NJPD_NONPM_SECURE_25            (NJPD_TZPC_NONPM_BASE + NJPD_OFFSET(0x25))
493 #define NJPD_NONPM_SECURE_26            (NJPD_TZPC_NONPM_BASE + NJPD_OFFSET(0x26))
494 #define NJPD_NONPM_SECURE_27            (NJPD_TZPC_NONPM_BASE + NJPD_OFFSET(0x27))
495 #define NJPD_NONPM_SECURE_28            (NJPD_TZPC_NONPM_BASE + NJPD_OFFSET(0x28))
496 #define NJPD_NONPM_SECURE_29            (NJPD_TZPC_NONPM_BASE + NJPD_OFFSET(0x29))
497 #define NJPD_NONPM_SECURE_2A            (NJPD_TZPC_NONPM_BASE + NJPD_OFFSET(0x2A))
498 #define NJPD_NONPM_SECURE_2B            (NJPD_TZPC_NONPM_BASE + NJPD_OFFSET(0x2B))
499 #define NJPD_NONPM_SECURE_2C            (NJPD_TZPC_NONPM_BASE + NJPD_OFFSET(0x2C))
500 #define NJPD_NONPM_SECURE_2D            (NJPD_TZPC_NONPM_BASE + NJPD_OFFSET(0x2D))
501 #define NJPD_NONPM_SECURE_2E            (NJPD_TZPC_NONPM_BASE + NJPD_OFFSET(0x2E))
502 #define NJPD_NONPM_SECURE_2F            (NJPD_TZPC_NONPM_BASE + NJPD_OFFSET(0x2F))
504 #define BK_TZPC_GENERAL(x)                          (NJPD_TZPC_NONPM_BASE+NJPD_OFFSET(x))
509 #define BK_JPD_SCONFIG                  (JPD_REG_BASE+NJPD_OFFSET(0x00))
510 #define BK_JPD_MCONFIG                  (JPD_REG_BASE+NJPD_OFFSET(0x01))
511 #define BK_JPD_RCSMADR_L                (JPD_REG_BASE+NJPD_OFFSET(0x0B))
512 #define BK_JPD_RCSMADR_H                (JPD_REG_BASE+NJPD_OFFSET(0x0C))
513 #define BK_JPD_RBUF_FLOOR_L             (JPD_REG_BASE+NJPD_OFFSET(0x0D))
514 #define BK_JPD_RBUF_FLOOR_H             (JPD_REG_BASE+NJPD_OFFSET(0x0E))
515 #define BK_JPD_RBUF_CEIL_L              (JPD_REG_BASE+NJPD_OFFSET(0x0F))
516 #define BK_JPD_RBUF_CEIL_H              (JPD_REG_BASE+NJPD_OFFSET(0x10))
517 #define BK_JPD_MWBF_SADR_L              (JPD_REG_BASE+NJPD_OFFSET(0x11))
518 #define BK_JPD_MWBF_SADR_H              (JPD_REG_BASE+NJPD_OFFSET(0x12))
519 #define BK_JPD_AUTO_PROTECT             (JPD_REG_BASE+NJPD_OFFSET(0x1F))
520 #define BK_JPD_MWBF_EADR_L              (JPD_REG_BASE+NJPD_OFFSET(0x20))
521 #define BK_JPD_MWBF_EADR_H              (JPD_REG_BASE+NJPD_OFFSET(0x21))
523 #define BK_JPD1_GENERAL(x)              (JPD_REG_BASE+NJPD_OFFSET(x))