522     HAL_WriteRegBit(VOP_CTRL0+1, b2MVD, BIT3); //inverse the field to MVD  in HAL_MVOP_SetFieldInverse()
523     HAL_WriteRegBit(VOP_CTRL0+1, b2IP, BIT4);  //inverse the field to IP  in HAL_MVOP_SetFieldInverse()
587     HAL_WriteRegBit(VOP_CTRL0, 0, BIT0);  in HAL_MVOP_Rst()
588     HAL_WriteRegBit(VOP_CTRL0, 1, BIT0);  in HAL_MVOP_Rst()
597     regval = HAL_ReadByte(VOP_CTRL0);  in HAL_MVOP_Enable()
608     HAL_WriteByte(VOP_CTRL0, regval);  in HAL_MVOP_Enable()
615     return (HAL_ReadRegBit(VOP_CTRL0, BIT0));  in HAL_MVOP_GetEnableState()
664     regval = HAL_ReadByte(VOP_CTRL0);  in HAL_MVOP_SetOutputInterlace()
676     HAL_WriteByte(VOP_CTRL0, regval);  in HAL_MVOP_SetOutputInterlace()
1285     HAL_WriteRegBit(VOP_CTRL0, ptiming->bHDuplicate, BIT2);// H pixel duplicate  in HAL_MVOP_SetOutputTiming()
1355         HAL_WriteRegBit(VOP_CTRL0, DISABLE, VOP_FSYNC_EN); // frame sync disable  in HAL_MVOP_SetSynClk()
1712     pMvopTimingInfo->bInterlace = (HAL_ReadRegBit(VOP_CTRL0, BIT7) == BIT7);  in HAL_MVOP_GetTimingInfoFromRegisters()
2053     HAL_WriteRegBit(VOP_CTRL0, bEnable, BIT3);// V line duplicate  in HAL_MVOP_SetVerDup()
2059     return (HAL_ReadRegBit(VOP_CTRL0, BIT3) == BIT3);  in HAL_MVOP_GetVerDup()
2064     HAL_WriteRegBit(VOP_CTRL0, bEnable, BIT3);// x4 duplicate should raise V line duplicate first  in HAL_MVOP_SetVerx4Dup()
2071     HAL_WriteRegBit(VOP_CTRL0, bEnable, BIT2);// x4 duplicate should raise H pixel duplicate first  in HAL_MVOP_SetHorx4Dup()
2078     return ((HAL_ReadRegBit(VOP_RGB_FMT, BIT3) & HAL_ReadRegBit(VOP_CTRL0, BIT3)) == BIT3);  in HAL_MVOP_GetVerx4Dup()
2083     return ((HAL_ReadRegBit(VOP_RGB_FMT, BIT2) & HAL_ReadRegBit(VOP_CTRL0, BIT2)) == BIT2);  in HAL_MVOP_GetHorx4Dup()
3122     HAL_WriteRegBit(SUB_REG(VOP_CTRL0+1), b2MVD, BIT3); //inverse the field to MVD  in HAL_MVOP_SubSetFieldInverse()
3123     HAL_WriteRegBit(SUB_REG(VOP_CTRL0+1), b2IP, BIT4);  //inverse the field to IP  in HAL_MVOP_SubSetFieldInverse()
3178     HAL_WriteRegBit(SUB_REG(VOP_CTRL0), 0, BIT0);  in HAL_MVOP_SubRst()
3179     HAL_WriteRegBit(SUB_REG(VOP_CTRL0), 1, BIT0);  in HAL_MVOP_SubRst()
3188     regval = HAL_ReadByte(SUB_REG(VOP_CTRL0));  in HAL_MVOP_SubEnable()
3199     HAL_WriteByte(SUB_REG(VOP_CTRL0), regval);  in HAL_MVOP_SubEnable()
3205     return (HAL_ReadRegBit(SUB_REG(VOP_CTRL0), BIT0));  in HAL_MVOP_SubGetEnableState()
3244     regval = HAL_ReadByte(SUB_REG(VOP_CTRL0));  in HAL_MVOP_SubSetOutputInterlace()
3256     HAL_WriteByte(SUB_REG(VOP_CTRL0), regval);  in HAL_MVOP_SubSetOutputInterlace()
3796     HAL_WriteRegBit(SUB_REG(VOP_CTRL0), ptiming->bHDuplicate, BIT2);// H pixel duplicate  in HAL_MVOP_SubSetOutputTiming()
3867         HAL_WriteRegBit(SUB_REG(VOP_CTRL0), DISABLE, VOP_FSYNC_EN); // frame sync disable  in HAL_MVOP_SubSetSynClk()
4097     pMvopTimingInfo->bInterlace = (HAL_ReadRegBit(SUB_REG(VOP_CTRL0), BIT7) == BIT7);  in HAL_MVOP_SubGetTimingInfoFromRegisters()