Lines Matching refs:BIT7

151     #define VOP_MVD_VS_SEL  BIT7
162     #define VOP_BURST_ST_SEL BIT7
179     #define VOP_FORCE_HIGH   BIT7 //Force DMA High priority
208     #define VOP_DEBUG_SEL       (BIT5 | BIT6 | BIT7) //u3 new: MVOP debug out select
211     #define EVD_ENABLE           BIT7
216     #define VOP_RAMAP_LUMA_EN   BIT7
221     #define VOP_RAMAP_CHROMA_EN   BIT7
237     #define VOP_RIU_DEBUG_SEL     (BIT6|BIT7) //RIU debug register select
258     #define VOP_MSB_BUF1_MIU_SEL            (BIT6|BIT7)  // UV miu select: miu0~3 = 0x0~0x3
276     #define VOP_INFO_FROM_CODEC_422_FMT      (BIT7) //422 format
284     #define VOP_INFO_FROM_CODEC_DS_IDX        (BIT7) //dynamic scaling index
297     #define VOP_LSB_BUF1_MIU_SEL            (BIT6|BIT7)  // LSB UV miu select: miu0~3 = 0x0~0x3
305 …#define VOP_MASK_BASE_LSB     (BIT7) //mask LSB of base address from Codec (always get top field b…
306     #define VOP_MIRROR_CFG_ENABLE (BIT3 | BIT4 | BIT5 | BIT6 | BIT7)
318     #define VOP_LR_DIFF_SIZE      (BIT7) //3D L/R dual buffer with difference size
327     #define VOP_420_BW_SAVE       (BIT7) //420 bw saving mode
368     #define VOP_MF1_BURST           (BIT6 | BIT7)