Lines Matching refs:NI_REG
158 #define NI_REG(addr) (*((volatile MS_U32*)(_gNI_Addr + (addr<<2) ))) macro
755 xiu_rdata = NI_REG(REG_NI_STATUS); in HAL_NSK2_KIW_BusyPolling()
758 xiu_rdata = NI_REG(REG_NI_STATUS); in HAL_NSK2_KIW_BusyPolling()
861 NI_REG(REG_NI_NSK2_FREERUN) |= NI_NSK2_FREERUN_ENABLE; in HAL_NSK2_Init()
865 u32Data = NI_REG(REG_NI_NSK2_FREERUN); in HAL_NSK2_Init()
884 NI_REG(REG_NI_NSK2_CTRL) &= (~NI_NSK2_RESET_DISABLE); in HAL_NSK2_Exit()
913 u32Data = NI_REG(REG_NI_NSK2_CTRL); in HAL_NSK2_ColdReset()
915 NI_REG(REG_NI_NSK2_CTRL) = (u32Data & (~NI_NSK2_RESET_DISABLE)); in HAL_NSK2_ColdReset()
922 …NI_REG(REG_NI_NSK2_CTRL) = u32Data | NI_TS2NSK_ENABLE | NI_NSK2_CLK_ENABLE | NI_NSK2_RESET_DISABLE; in HAL_NSK2_ColdReset()
926 u32Data = NI_REG(REG_NI_NSK2_CTRL); in HAL_NSK2_ColdReset()
945 u32Data = NI_REG(REG_NI_NSK2_CTRL); in HAL_NSK2_EndSubtest()
951 NI_REG(REG_NI_NSK2_CTRL) = (u32Data & (~NI_NSK2_RESET_DISABLE)); in HAL_NSK2_EndSubtest()
1104 data = NI_REG(REG_NI_COMMAND); in HAL_NSK2_NSKBasicInitializationComplete()
1106 NI_REG(REG_NI_COMMAND) = (NI_NSKBIComplete | NI_COMMAND_START); in HAL_NSK2_NSKBasicInitializationComplete()
1110 NI_REG(REG_NI_NSK2_CLK_CSA) = NSK2_EN_CSA_VAR; in HAL_NSK2_NSKBasicInitializationComplete()
1154 NI_REG(REG_NI_PARAMETERS) = data; in HAL_NSK2_WriteESA()
1155 NI_REG(REG_NI_COMMAND) = (NI_COMMAND_START | NI_WriteESA); in HAL_NSK2_WriteESA()
1198 data = NI_REG(REG_NI_KTE_STATUS); in HAL_NSK2_WriteTransportKey()
1209 NI_REG(REG_NI_PARAMETERS) = data2; in HAL_NSK2_WriteTransportKey()
1210 NI_REG(REG_NI_IV_127_96) = pIV[0]; in HAL_NSK2_WriteTransportKey()
1211 NI_REG(REG_NI_IV_95_64) = pIV[1]; in HAL_NSK2_WriteTransportKey()
1212 NI_REG(REG_NI_IV_63_31) = pIV[2]; in HAL_NSK2_WriteTransportKey()
1213 NI_REG(REG_NI_IV_31_00) = pIV[3]; in HAL_NSK2_WriteTransportKey()
1214 NI_REG(REG_NI_COMMAND) = (NI_COMMAND_START | NI_WriteTransportKey); in HAL_NSK2_WriteTransportKey()
1216 …HALNSK2_DBG(NSK2_DBGLV_INFO,"NI 7 : %x, NI 6 = %x\n", NI_REG(REG_NI_PARAMETERS) , NI_REG(REG_NI_CO… in HAL_NSK2_WriteTransportKey()
1263 data = NI_REG(REG_NI_NSK2_KTE_VALID_FPGA); in HAL_NSK2_CompareKTE()
1268 data = NI_REG(KTE_Index); in HAL_NSK2_CompareKTE()
1307 low_data = NI_REG(REG_NI_COMPARE_GENOUT_L); in HAL_NSK2_CompareOut()
1308 high_data = (NI_REG(REG_NI_COMPARE_GENOUT_H)&NI_GENOUT_H_MASK); in HAL_NSK2_CompareOut()
1328 NI_REG(REG_NI_SW_SET_RNG) = (RNG_Value&NI_SW_RNG_MASK); in HAL_NSK2_SetRNG()
1361 NI_REG(REG_NI_PARAMETERS) = wdata; in HAL_NSK2_WriteM2MKey()
1363 NI_REG(REG_NI_IV_127_96) = pWIV[0]; in HAL_NSK2_WriteM2MKey()
1364 NI_REG(REG_NI_IV_95_64) = pWIV[1]; in HAL_NSK2_WriteM2MKey()
1365 NI_REG(REG_NI_IV_63_31) = pWIV[2]; in HAL_NSK2_WriteM2MKey()
1366 NI_REG(REG_NI_IV_31_00) = pWIV[3]; in HAL_NSK2_WriteM2MKey()
1369 NI_REG(REG_NI_COMMAND) = (NI_COMMAND_START | NI_WriteM2MKey); //write M2M key and start... in HAL_NSK2_WriteM2MKey()
1378 NI_REG(REG_NI_COMMAND) = (NI_WriteSCPUKey | NI_COMMAND_START); in HAL_NSK2_WriteSCPUKey()
1389 NI_REG(REG_NI_COMMAND) = (NI_WriteReservedKey | NI_COMMAND_START); in HAL_NSK2_WriteReservedKey()
1392 …HALNSK2_DBG(NSK2_DBGLV_INFO,"write key = %x, %x\n", NI_REG(REG_NI_COMPARE_GENOUT_L), NI_REG(REG_NI… in HAL_NSK2_WriteReservedKey()
1393 KeyNum = NI_REG(REG_NI_COMPARE_GENOUT_L)>>17; in HAL_NSK2_WriteReservedKey()
1413 NI_REG(REG_NI_COMMAND) = (NI_COMMAND_START | NI_DriveAck); in HAL_NSK2_DriveKteAck()
2288 u32NvCounter = NI_REG(REG_NI_NSK21_GET_NVCOUNTER); in HAL_NSK2_GetNVCounterConfig()
2339 u32Data = NI_REG(REG_NI_NSK2_CTRL); in HAL_NSK2_ClockTest()
2342 NI_REG(REG_NI_NSK2_CTRL) = u32Data | NI_NSK2_RESET_DISABLE | NI_NSK2_CLK_ENABLE; in HAL_NSK2_ClockTest()
2345 u32Data = NI_REG(REG_NI_NSK2_CTRL); in HAL_NSK2_ClockTest()
2358 u32Data = NI_REG(REG_NI_NSK2_CTRL); in HAL_NSK2_ClockTest()
2362 NI_REG(REG_NI_NSK2_CTRL) = u32Data & ~(NI_NSK2_CLK_ENABLE) ; in HAL_NSK2_ClockTest()
2364 u32Data = NI_REG(REG_NI_NSK2_CTRL); in HAL_NSK2_ClockTest()
2377 u32Data = NI_REG(REG_NI_NSK2_CTRL); in HAL_NSK2_ClockTest()
2381 NI_REG(REG_NI_NSK2_CTRL) = u32Data | NI_NSK2_RESET_DISABLE | NI_NSK2_CLK_ENABLE; in HAL_NSK2_ClockTest()
2384 u32Data = NI_REG(REG_NI_NSK2_CTRL); in HAL_NSK2_ClockTest()
2395 u32Data = NI_REG(REG_NI_NSK2_CTRL); in HAL_NSK2_ClockTest()
2399 NI_REG(REG_NI_NSK2_CTRL) = u32Data & ~(NI_NSK2_CLK_ENABLE) ; in HAL_NSK2_ClockTest()
2401 u32Data = NI_REG(REG_NI_NSK2_CTRL); in HAL_NSK2_ClockTest()
2414 NI_REG(REG_NI_NSK2_CTRL) = NI_REG(REG_NI_NSK2_CTRL) & (~NI_NSK2_RESET_DISABLE); in HAL_NSK2_GetRNGThroughPut()
2415 …NI_REG(REG_NI_NSK2_FREERUN) = NI_REG(REG_NI_NSK2_FREERUN) & (~ (NI_NSK2_RANDOM_FREERUN | NI_NSK2_R… in HAL_NSK2_GetRNGThroughPut()
2423 valid = NI_REG(REG_NI_NSK2_TRNG_VALID) & NI_NSK2_TRNG_VALID_MASK; //trng_sw_read_valid_nsk ; in HAL_NSK2_GetRNGThroughPut()
2426 pRNG_Data[i] = NI_REG(REG_NI_NSK2_TRNG_DATA);//trng_sw_read_data_nsk; in HAL_NSK2_GetRNGThroughPut()
2427 …NI_REG(REG_NI_NSK2_FREERUN) = NI_REG(REG_NI_NSK2_FREERUN) | NI_NSK2_RANDOM_ONEBYONE; //lfsr_get_g… in HAL_NSK2_GetRNGThroughPut()
2462 MS_U32 u32Data = NI_REG(REG_NI_NSK2_CTRL); in HAL_NSK2_PushSlowClock()
2467 NI_REG(REG_NI_NSK2_CTRL) = u32Data & (~NI_NSK2_CLK_ENABLE) ; in HAL_NSK2_PushSlowClock()
2476 NI_REG(REG_NI_NSK2_CTRL) = u32Data | NI_NSK2_CLK_ENABLE ; in HAL_NSK2_PushSlowClock()
2482 HALNSK2_DBG(NSK2_DBGLV_DEBUG,"REG_NI_NSK2_CTRL = %x\n",NI_REG(REG_NI_NSK2_CTRL)); in HAL_NSK2_PushSlowClock()
2485 u32Data = NI_REG(REG_NI_NSK2_CLK_CSA); in HAL_NSK2_PushSlowClock()
2489 u32Data = NI_REG(REG_NI_NSK2_CLK_CSA); in HAL_NSK2_PushSlowClock()
2499 NI_REG(REG_NI_NSK2_CLK_CSA) = u32Data | NSK2_PUSH_SLOW_CLK; in HAL_NSK2_PushSlowClock()
2650 MS_U32 NI13 = NI_REG(13); in HAL_NSK2_ReadSwitchFromNSK2()
2733 u32KTEResp = NI_REG(REG_NI_NSK2_KTE_RESP); in HAL_NSK2_ReadKTEResp()
2813 NI_REG(REG_NI_COMMAND) = (NI_COMMAND_START | NI_InvalidateCmChannel | u32PidSlot); in HAL_NSK21_InvalidCmChannel()
2873 NI_REG(REG_NI_DSCMB_ALGO) = algorithms; in HAL_NSK21_CfgCmChannel()
2876 NI_REG(REG_NI_COMMAND) = (NI_COMMAND_START | NI_ConfigureCmChannel | u32PidSlot); in HAL_NSK21_CfgCmChannel()
2878 HALNSK2_DBG(NSK2_DBGLV_INFO,"REG_NI_DSCMB_ALGO = %x\n",NI_REG(REG_NI_DSCMB_ALGO)); in HAL_NSK21_CfgCmChannel()
2893 data = NI_REG(REG_NI_KTE_STATUS); in HAL_NSK21_WriteTransportKey()
2905 …NI_REG(REG_NI_COMMAND) = (NI_COMMAND_START | NI_WriteTransportKey | data2 | NI_OTP_ACK_NSK2 | NI_E… in HAL_NSK21_WriteTransportKey()
2907 NI_REG(REG_NI_COMMAND) = (NI_COMMAND_START | NI_WriteTransportKey | data2); in HAL_NSK21_WriteTransportKey()
2909 HALNSK2_DBG(NSK2_DBGLV_INFO,"NI 6 = %x\n", NI_REG(REG_NI_COMMAND)); in HAL_NSK21_WriteTransportKey()
2934 NI_REG(REG_NI_DSCMB_ALGO) = algorithms; in HAL_NSK21_WriteM2MKey()
2935 NI_REG(REG_NI_COMMAND) = (NI_COMMAND_START | NI_WriteM2MKey); in HAL_NSK21_WriteM2MKey()
2948 GenIn = NI_REG(REG_NI_NSK2_REG_GENIN); in HAL_NSK21_ModifyGenIn()
2960 NI_REG(REG_NI_NSK21_GENIN) = WriteGenIn; in HAL_NSK21_ModifyGenIn()
2965 NI_REG(REG_NI_NSK21_GENIN) = WriteGenIn; in HAL_NSK21_ModifyGenIn()
2967 NI_REG(REG_NI_NSK21_CONCURR_PROT_EN) = ((WriteGenIn>>10) & BMASK(1:0)); in HAL_NSK21_ModifyGenIn()
2968 NI_REG(REG_NI_NSK21_CONCURR_SET) = ((WriteGenIn>>12) & BMASK(0:0)); in HAL_NSK21_ModifyGenIn()
2969 NI_REG(REG_NI_NSK21_GEN_SHOT) = ((WriteGenIn>>14) & BMASK(3:0)); in HAL_NSK21_ModifyGenIn()
2973 … CONCURR_SET = %x, GEN_SHOT = %x\n", NI_REG(REG_NI_NSK21_CONCURR_PROT_EN), NI_REG(REG_NI_NSK21_CON… in HAL_NSK21_ModifyGenIn()
2975 GenIn = NI_REG(REG_NI_NSK2_REG_GENIN); in HAL_NSK21_ModifyGenIn()
2988 return NI_REG(REG_NI_NSK2_REG_GENIN); in HAL_NSK21_GetGenIn()
2993 return NI_REG(offset); in HAL_NSK21_ReadNIReg()
2998 NI_REG(offset) = Value; in HAL_NSK21_WriteNIReg()
3023 NI_REG(REG_NI_COMMAND) = (NI_COMMAND_START | NI_WriteJTAGKey | functionality | OID); in HAL_NSK21_WriteJTagKey()
3036 NI_REG(REG_NI_COMMAND) = (NI_COMMAND_START | NI_IncrementNvCounter); in HAL_NSK21_IncrementNvCounter()
3047 NI_REG(REG_NI_COMMAND) = (NI_COMMAND_START | NI_WriteOTPKey); in HAL_NSK2_WriteOtpKey()
3059 RegPwd = NI_REG(REG_NI_NSK2_PWD_ON); in HAL_NSK2_ReadPWD_Status()
3114 NI_REG(REG_NI_NSK2_CTRL) |= (NI_NSK2_CLK_ENABLE | NI_NSK2_RESET_DISABLE); in HAL_NSK2_CtrlClk()
3120 NI_REG(REG_NI_NSK2_CTRL) &= ~(NI_NSK2_CLK_ENABLE | NI_NSK2_RESET_DISABLE); in HAL_NSK2_CtrlClk()
3128 printf("REG_NI_NSK2_CTRL = %x\n",NI_REG(REG_NI_NSK2_CTRL)); in HAL_NSK2_CtrlClk()
3137 status = (NI_REG(REG_NI_KTE_STATUS)& NI_SLOW_CLOCK_DETECT); in HAL_NSK2_ReadClkStatus()
3139 printf("REG_NI_KTE_STATUS = %x\n",NI_REG(REG_NI_KTE_STATUS)); in HAL_NSK2_ReadClkStatus()