kano/nsk2/halNDSRASP.c

117 static REG_RASP*    _RASPReg[RASP_NUM]                 = {NULL , NULL};  variable
321     _RASPReg[0]                = (REG_RASP*)(_u32RegBase + RASP0_BANK0_REG_CTRL_BASE);  in HAL_NDSRASP_SetBank()
327     _RASPReg[1]                = (REG_RASP*)(_u32RegBase + RASP1_BANK0_REG_CTRL_BASE);  in HAL_NDSRASP_SetBank()
523         _HAL_REG16_W(&_RASPReg[u32RASPEng][0].RASP_HW_CTRL3,  in HAL_NDSRASP_Payload_Enable()
524         SET_FLAG1(_HAL_REG16_R(&_RASPReg[u32RASPEng][0].RASP_HW_CTRL3), RASP_PAYLD2MIU_RST_WADDR));  in HAL_NDSRASP_Payload_Enable()
525         _HAL_REG16_W(&_RASPReg[u32RASPEng][0].RASP_HW_CTRL3,  in HAL_NDSRASP_Payload_Enable()
526 …      RESET_FLAG1(_HAL_REG16_R(&_RASPReg[u32RASPEng][0].RASP_HW_CTRL3), RASP_PAYLD2MIU_RST_WADDR));  in HAL_NDSRASP_Payload_Enable()
529         _HAL_REG16_W(&_RASPReg[u32RASPEng][0].RASP_HW_CTRL2,  in HAL_NDSRASP_Payload_Enable()
530         SET_FLAG1(_HAL_REG16_R(&_RASPReg[u32RASPEng][0].RASP_HW_CTRL2), RASP_PAYLOAD_BURST_LEN));  in HAL_NDSRASP_Payload_Enable()
532         _HAL_REG16_W(&_RASPReg[u32RASPEng][0].RASP_HW_CTRL3,  in HAL_NDSRASP_Payload_Enable()
533         SET_FLAG1(_HAL_REG16_R(&_RASPReg[u32RASPEng][0].RASP_HW_CTRL3), RASP_PAYLD2MIU_EN));  in HAL_NDSRASP_Payload_Enable()
534         _HAL_REG16_W(&_RASPReg[u32RASPEng][0].RASP_HW_CTRL3,  in HAL_NDSRASP_Payload_Enable()
535         SET_FLAG1(_HAL_REG16_R(&_RASPReg[u32RASPEng][0].RASP_HW_CTRL3), RASP_PAYLD2MIU_PINGPONE));  in HAL_NDSRASP_Payload_Enable()
539         _HAL_REG16_W(&_RASPReg[u32RASPEng][0].RASP_HW_CTRL3,  in HAL_NDSRASP_Payload_Enable()
540 …             RESET_FLAG1(_HAL_REG16_R(&_RASPReg[u32RASPEng][0].RASP_HW_CTRL3), RASP_PAYLD2MIU_EN));  in HAL_NDSRASP_Payload_Enable()
618 …_HAL_REG16_W(&_RASPReg[u32RASPEng][0].RASP_CorptFromTo, ((u16To << RASP_TO_SHIFT )&RASP_FROMTO_MAS…  in HAL_NDSRASP_SetCorptData()
619     _HAL_REG16_W(&_RASPReg[u32RASPEng][0].RASP_CorptData_PktSize2,  in HAL_NDSRASP_SetCorptData()
620                    _HAL_REG16_R(&_RASPReg[u32RASPEng][0].RASP_CorptData_PktSize2)|u8Data);  in HAL_NDSRASP_SetCorptData()
729     _HAL_REG16_W(&_RASPReg[u32RASPEng][0].RASP_Ecm_reg_18,0X0007);  in HAL_NDSRASP_SetECM_Init_1()
742     _HAL_REG16_W(&_RASPReg[u32RASPEng][0].RASP_Ecm_reg_16 ,0X8180);  in HAL_NDSRASP_SetECM_Init_2()
743     _HAL_REG16_W(&_RASPReg[u32RASPEng][0].RASP_Ecm_reg_17 ,0X7777);  in HAL_NDSRASP_SetECM_Init_2()
744     _HAL_REG16_W(&_RASPReg[u32RASPEng][0].RASP_Ecm_reg_32 ,0X0077);  in HAL_NDSRASP_SetECM_Init_2()
838     _HAL_REG32_W(&_RASPReg[u32RASPEng][0].RASP_Str2miu_Head,MIU(u32StartAddr0));
839     _HAL_REG32_W(&_RASPReg[u32RASPEng][0].RASP_Str2miu_Head2,MIU(u32StartAddr1));
846     _HAL_REG32_W(&_RASPReg[u32RASPEng][0].RASP_Str2miu_Mid,MIU(u32MidAddr0));
847     _HAL_REG32_W(&_RASPReg[u32RASPEng][0].RASP_Str2miu_Mid2,MIU(u32MidAddr1));
854     _HAL_REG32_W(&_RASPReg[u32RASPEng][0].RASP_Str2miu_Tail,MIU(u32EndAddr0));
855     _HAL_REG32_W(&_RASPReg[u32RASPEng][0].RASP_Str2miu_Tail2,MIU(u32EndAddr1));
861     _HAL_REG32_W(&_RASPReg[u32RASPEng][0].RASP_Payload2miu_Head,MIU(u32StartAddr0));
862     _HAL_REG32_W(&_RASPReg[u32RASPEng][0].RASP_Payload2miu_Head2,MIU(u32StartAddr1));
868     _HAL_REG32_W(&_RASPReg[u32RASPEng][0].RASP_Payload2miu_Mid,MIU(u32MidAddr0));
869     _HAL_REG32_W(&_RASPReg[u32RASPEng][0].RASP_Payload2miu_Mid2,MIU(u32MidAddr1));
875     _HAL_REG32_W(&_RASPReg[u32RASPEng][0].RASP_Payload2miu_Tail,MIU(u32EndAddr0));
876     _HAL_REG32_W(&_RASPReg[u32RASPEng][0].RASP_Payload2miu_Tail2,MIU(u32EndAddr1));
882     _HAL_REG32_W(&_RASPReg[u32RASPEng][0].RASP_Ecm2miu_Head,MIU(u32StartAddr));
888     _HAL_REG32_W(&_RASPReg[u32RASPEng][0].RASP_Ecm2miu_Mid,MIU(u32MidAddr));
894     _HAL_REG32_W(&_RASPReg[u32RASPEng][0].RASP_Ecm2miu_Tail,MIU(u32EndAddr));
911     _HAL_REG16_W(&_RASPReg[u32RASPEng][0].RASP_HW_CTRL4,  in HAL_NDSRASP_GetWritePtr()
912         SET_FLAG1(_HAL_REG16_R(&_RASPReg[u32RASPEng][0].RASP_HW_CTRL4) , RASP_TS_STR2MI_WP_LD_DIS));  in HAL_NDSRASP_GetWritePtr()
914     WritePtr = ((_HAL_REG32_R(&_RASPReg[u32RASPEng][0].RASP_Str2miu_Mid)) << 4);  in HAL_NDSRASP_GetWritePtr()
916     _HAL_REG16_W(&_RASPReg[u32RASPEng][0].RASP_HW_CTRL4,  in HAL_NDSRASP_GetWritePtr()
917 …     RESET_FLAG1(_HAL_REG16_R(&_RASPReg[u32RASPEng][0].RASP_HW_CTRL4) , RASP_TS_STR2MI_WP_LD_DIS));  in HAL_NDSRASP_GetWritePtr()
1006     _HAL_REG32_W(&_RASPReg[u32RASPEng][0].RASP_EcmLPCR1Buf , u32Stamp);  in HAL_NDSRASP_SetECMTimeStamp()
1029     _HAL_REG32_W(&_RASPReg[u32RASPEng][0].RASP_PayLPCR1Buf , u32Stamp);  in HAL_NDSRASP_SetPayloadTimeStamp()
1031     _HAL_REG16_W(&_RASPReg[u32RASPEng][0].RASP_HW_CTRL3,  in HAL_NDSRASP_SetPayloadTimeStamp()
1032         SET_FLAG1(_HAL_REG16_R(&_RASPReg[u32RASPEng][0].RASP_HW_CTRL3) , RASP_PAYLD2MIU_LPCR_WT));  in HAL_NDSRASP_SetPayloadTimeStamp()
1033     _HAL_REG16_W(&_RASPReg[u32RASPEng][0].RASP_HW_CTRL3,  in HAL_NDSRASP_SetPayloadTimeStamp()
1034         RESET_FLAG1(_HAL_REG16_R(&_RASPReg[u32RASPEng][0].RASP_HW_CTRL3) , RASP_PAYLD2MIU_LPCR_WT));  in HAL_NDSRASP_SetPayloadTimeStamp()
1431         _HAL_REG16_W(&_RASPReg[u32RASPEng][0].RASP_HW_CTRL4,  in HAL_NDSRASP_SetStream_47_48()
1432 …RESET_FLAG1(_HAL_REG16_R(&_RASPReg[u32RASPEng][0].RASP_HW_CTRL4), RASP_AUTO_STREAM_47_48)); // '0'…  in HAL_NDSRASP_SetStream_47_48()
1437         _HAL_REG16_W(&_RASPReg[u32RASPEng][0].RASP_HW_CTRL4,  in HAL_NDSRASP_SetStream_47_48()
1438 …SET_FLAG1(_HAL_REG16_R(&_RASPReg[u32RASPEng][0].RASP_HW_CTRL4), RASP_AUTO_STREAM_47_48));// '0' fo…  in HAL_NDSRASP_SetStream_47_48()