Lines Matching refs:NI_REG
160 #define NI_REG(addr) (*((volatile MS_U32*)(_gNI_Addr + (addr<<2) ))) macro
741 xiu_rdata = NI_REG(REG_NI_STATUS); in HAL_NSK2_KIW_BusyPolling()
744 xiu_rdata = NI_REG(REG_NI_STATUS); in HAL_NSK2_KIW_BusyPolling()
849 u32Data = NI_REG(REG_NI_NSK2_CTRL); in HAL_NSK2_Init()
857 …NI_REG(REG_NI_NSK2_CTRL) = u32Data | NI_TS2NSK_ENABLE | NI_NSK2_CLK_ENABLE | NI_NSK2_RESET_DISABLE; in HAL_NSK2_Init()
860 u32Data = NI_REG(REG_NI_NSK2_CTRL); in HAL_NSK2_Init()
869 NI_REG(REG_NI_NSK2_FREERUN) |= NI_NSK2_FREERUN_ENABLE; in HAL_NSK2_Init()
873 u32Data = NI_REG(REG_NI_NSK2_FREERUN); in HAL_NSK2_Init()
900 u32Data = NI_REG(REG_NI_NSK2_CTRL); in HAL_NSK2_ColdReset()
902 NI_REG(REG_NI_NSK2_CTRL) = (u32Data & (~NI_NSK2_RESET_DISABLE)); in HAL_NSK2_ColdReset()
909 …NI_REG(REG_NI_NSK2_CTRL) = u32Data | NI_TS2NSK_ENABLE | NI_NSK2_CLK_ENABLE | NI_NSK2_RESET_DISABLE; in HAL_NSK2_ColdReset()
913 u32Data = NI_REG(REG_NI_NSK2_CTRL); in HAL_NSK2_ColdReset()
932 u32Data = NI_REG(REG_NI_NSK2_CTRL); in HAL_NSK2_EndSubtest()
938 NI_REG(REG_NI_NSK2_CTRL) = (u32Data & (~NI_NSK2_RESET_DISABLE)); in HAL_NSK2_EndSubtest()
1089 data = NI_REG(REG_NI_COMMAND); in HAL_NSK2_NSKBasicInitializationComplete()
1091 NI_REG(REG_NI_COMMAND) = (NI_NSKBIComplete | NI_COMMAND_START); in HAL_NSK2_NSKBasicInitializationComplete()
1095 NI_REG(REG_NI_NSK2_CLK_CSA) = NSK2_EN_CSA_VAR; in HAL_NSK2_NSKBasicInitializationComplete()
1139 NI_REG(REG_NI_PARAMETERS) = data; in HAL_NSK2_WriteESA()
1140 NI_REG(REG_NI_COMMAND) = (NI_COMMAND_START | NI_WriteESA); in HAL_NSK2_WriteESA()
1183 data = NI_REG(REG_NI_KTE_STATUS); in HAL_NSK2_WriteTransportKey()
1194 NI_REG(REG_NI_PARAMETERS) = data2; in HAL_NSK2_WriteTransportKey()
1195 NI_REG(REG_NI_IV_127_96) = pIV[0]; in HAL_NSK2_WriteTransportKey()
1196 NI_REG(REG_NI_IV_95_64) = pIV[1]; in HAL_NSK2_WriteTransportKey()
1197 NI_REG(REG_NI_IV_63_31) = pIV[2]; in HAL_NSK2_WriteTransportKey()
1198 NI_REG(REG_NI_IV_31_00) = pIV[3]; in HAL_NSK2_WriteTransportKey()
1199 NI_REG(REG_NI_COMMAND) = (NI_COMMAND_START | NI_WriteTransportKey); in HAL_NSK2_WriteTransportKey()
1201 …HALNSK2_DBG(NSK2_DBGLV_INFO,"NI 7 : %x, NI 6 = %x\n", NI_REG(REG_NI_PARAMETERS) , NI_REG(REG_NI_CO… in HAL_NSK2_WriteTransportKey()
1248 data = NI_REG(REG_NI_NSK2_KTE_VALID_FPGA); in HAL_NSK2_CompareKTE()
1253 data = NI_REG(KTE_Index); in HAL_NSK2_CompareKTE()
1292 low_data = NI_REG(REG_NI_COMPARE_GENOUT_L); in HAL_NSK2_CompareOut()
1293 high_data = (NI_REG(REG_NI_COMPARE_GENOUT_H)&NI_GENOUT_H_MASK); in HAL_NSK2_CompareOut()
1313 NI_REG(REG_NI_SW_SET_RNG) = (RNG_Value&NI_SW_RNG_MASK); in HAL_NSK2_SetRNG()
1346 NI_REG(REG_NI_PARAMETERS) = wdata; in HAL_NSK2_WriteM2MKey()
1348 NI_REG(REG_NI_IV_127_96) = pWIV[0]; in HAL_NSK2_WriteM2MKey()
1349 NI_REG(REG_NI_IV_95_64) = pWIV[1]; in HAL_NSK2_WriteM2MKey()
1350 NI_REG(REG_NI_IV_63_31) = pWIV[2]; in HAL_NSK2_WriteM2MKey()
1351 NI_REG(REG_NI_IV_31_00) = pWIV[3]; in HAL_NSK2_WriteM2MKey()
1354 NI_REG(REG_NI_COMMAND) = (NI_COMMAND_START | NI_WriteM2MKey); //write M2M key and start... in HAL_NSK2_WriteM2MKey()
1363 NI_REG(REG_NI_COMMAND) = (NI_WriteSCPUKey | NI_COMMAND_START); in HAL_NSK2_WriteSCPUKey()
1374 NI_REG(REG_NI_COMMAND) = (NI_WriteReservedKey | NI_COMMAND_START); in HAL_NSK2_WriteReservedKey()
1377 … printf("write key = %x, %x\n", NI_REG(REG_NI_COMPARE_GENOUT_L), NI_REG(REG_NI_COMPARE_GENOUT_H)); in HAL_NSK2_WriteReservedKey()
1378 KeyNum = NI_REG(REG_NI_COMPARE_GENOUT_L)>>17; in HAL_NSK2_WriteReservedKey()
1398 NI_REG(REG_NI_COMMAND) = (NI_COMMAND_START | NI_DriveAck); in HAL_NSK2_DriveKteAck()
1400 NI_REG(REG_NI_COMMAND) = (NI_COMMAND_START | NI_NopNop); in HAL_NSK2_DriveKteAck()
2399 u32Data = NI_REG(REG_NI_NSK2_CTRL); in HAL_NSK2_ClockTest()
2403 NI_REG(REG_NI_NSK2_CTRL) = u32Data | NI_NSK2_RESET_DISABLE | NI_NSK2_CLK_ENABLE; in HAL_NSK2_ClockTest()
2406 u32Data = NI_REG(REG_NI_NSK2_CTRL); in HAL_NSK2_ClockTest()
2419 u32Data = NI_REG(REG_NI_NSK2_CTRL); in HAL_NSK2_ClockTest()
2423 NI_REG(REG_NI_NSK2_CTRL) = u32Data & ~(NI_NSK2_CLK_ENABLE) ; in HAL_NSK2_ClockTest()
2425 u32Data = NI_REG(REG_NI_NSK2_CTRL); in HAL_NSK2_ClockTest()
2438 u32Data = NI_REG(REG_NI_NSK2_CTRL); in HAL_NSK2_ClockTest()
2442 NI_REG(REG_NI_NSK2_CTRL) = u32Data | NI_NSK2_RESET_DISABLE | NI_NSK2_CLK_ENABLE; in HAL_NSK2_ClockTest()
2445 u32Data = NI_REG(REG_NI_NSK2_CTRL); in HAL_NSK2_ClockTest()
2456 u32Data = NI_REG(REG_NI_NSK2_CTRL); in HAL_NSK2_ClockTest()
2460 NI_REG(REG_NI_NSK2_CTRL) = u32Data & ~(NI_NSK2_CLK_ENABLE) ; in HAL_NSK2_ClockTest()
2462 u32Data = NI_REG(REG_NI_NSK2_CTRL); in HAL_NSK2_ClockTest()
2475 NI_REG(REG_NI_NSK2_CTRL) = NI_REG(REG_NI_NSK2_CTRL) & (~NI_NSK2_RESET_DISABLE); in HAL_NSK2_GetRNGThroughPut()
2476 …NI_REG(REG_NI_NSK2_FREERUN) = NI_REG(REG_NI_NSK2_FREERUN) & (~ (NI_NSK2_RANDOM_FREERUN | NI_NSK2_R… in HAL_NSK2_GetRNGThroughPut()
2484 valid = NI_REG(REG_NI_NSK2_TRNG_VALID) & NI_NSK2_TRNG_VALID_MASK; //trng_sw_read_valid_nsk ; in HAL_NSK2_GetRNGThroughPut()
2487 pRNG_Data[i] = NI_REG(REG_NI_NSK2_TRNG_DATA);//trng_sw_read_data_nsk; in HAL_NSK2_GetRNGThroughPut()
2488 …NI_REG(REG_NI_NSK2_FREERUN) = NI_REG(REG_NI_NSK2_FREERUN) | NI_NSK2_RANDOM_ONEBYONE; //lfsr_get_g… in HAL_NSK2_GetRNGThroughPut()
2523 MS_U32 u32Data = NI_REG(REG_NI_NSK2_CTRL); in HAL_NSK2_PushSlowClock()
2528 NI_REG(REG_NI_NSK2_CTRL) = u32Data & (~NI_NSK2_CLK_ENABLE) ; in HAL_NSK2_PushSlowClock()
2533 NI_REG(REG_NI_NSK2_CTRL) = u32Data | NI_NSK2_CLK_ENABLE ; in HAL_NSK2_PushSlowClock()
2541 u32Data = NI_REG(REG_NI_NSK2_CLK_CSA); in HAL_NSK2_PushSlowClock()
2554 NI_REG(REG_NI_NSK2_CLK_CSA) = u32Data | NSK2_PUSH_SLOW_CLK; in HAL_NSK2_PushSlowClock()
2705 MS_U32 NI13 = NI_REG(13); in HAL_NSK2_ReadSwitchFromNSK2()
4160 u32KTEResp = NI_REG(REG_NI_NSK2_KTE_RESP); in HAL_NSK2_ReadKTEResp()
4240 NI_REG(REG_NI_COMMAND) = (NI_COMMAND_START | NI_InvalidateCmChannel | u32PidSlot); in HAL_NSK21_InvalidCmChannel()
4283 NI_REG(REG_NI_DSCMB_ALGO) = algorithms; in HAL_NSK21_CfgCmChannel()
4286 NI_REG(REG_NI_COMMAND) = (NI_COMMAND_START | NI_ConfigureCmChannel | u32PidSlot); in HAL_NSK21_CfgCmChannel()
4288 HALNSK2_DBG(NSK2_DBGLV_INFO,"REG_NI_DSCMB_ALGO = %x\n",NI_REG(REG_NI_DSCMB_ALGO)); in HAL_NSK21_CfgCmChannel()
4303 data = NI_REG(REG_NI_KTE_STATUS); in HAL_NSK21_WriteTransportKey()
4315 …NI_REG(REG_NI_COMMAND) = (NI_COMMAND_START | NI_WriteTransportKey | data2 | NI_OTP_ACK_NSK2 | NI_E… in HAL_NSK21_WriteTransportKey()
4317 NI_REG(REG_NI_COMMAND) = (NI_COMMAND_START | NI_WriteTransportKey | data2); in HAL_NSK21_WriteTransportKey()
4319 HALNSK2_DBG(NSK2_DBGLV_INFO,"NI 6 = %x\n", NI_REG(REG_NI_COMMAND)); in HAL_NSK21_WriteTransportKey()
4344 NI_REG(REG_NI_DSCMB_ALGO) = algorithms; in HAL_NSK21_WriteM2MKey()
4345 NI_REG(REG_NI_COMMAND) = (NI_COMMAND_START | NI_WriteM2MKey); in HAL_NSK21_WriteM2MKey()
4358 GenIn = NI_REG(REG_NI_NSK2_REG_GENIN); in HAL_NSK21_ModifyGenIn()
4370 NI_REG(REG_NI_NSK21_GENIN) = WriteGenIn; in HAL_NSK21_ModifyGenIn()
4374 NI_REG(REG_NI_NSK21_GENIN) = (WriteGenIn & BMASK(9:0)); in HAL_NSK21_ModifyGenIn()
4376 NI_REG(REG_NI_NSK21_CONCURR_PROT_EN) = ((WriteGenIn>>10) & BMASK(1:0)); in HAL_NSK21_ModifyGenIn()
4377 NI_REG(REG_NI_NSK21_CONCURR_SET) = ((WriteGenIn>>12) & BMASK(0:0)); in HAL_NSK21_ModifyGenIn()
4378 NI_REG(REG_NI_NSK21_GEN_SHOT) = ((WriteGenIn>>14) & BMASK(3:0)); in HAL_NSK21_ModifyGenIn()
4382 … CONCURR_SET = %x, GEN_SHOT = %x\n", NI_REG(REG_NI_NSK21_CONCURR_PROT_EN), NI_REG(REG_NI_NSK21_CON… in HAL_NSK21_ModifyGenIn()
4384 GenIn = NI_REG(REG_NI_NSK2_REG_GENIN); in HAL_NSK21_ModifyGenIn()
4397 return NI_REG(REG_NI_NSK2_REG_GENIN); in HAL_NSK21_GetGenIn()
4402 return NI_REG(offset); in HAL_NSK21_ReadNIReg()
4407 NI_REG(offset) = Value; in HAL_NSK21_WriteNIReg()
4421 NI_REG(REG_NI_COMMAND) = (NI_COMMAND_START | NI_WriteJTAGKey | functionality); in HAL_NSK21_WriteJTagKey()
4434 NI_REG(REG_NI_COMMAND) = (NI_COMMAND_START | NI_IncrementNvCounter); in HAL_NSK21_IncrementNvCounter()
4445 NI_REG(REG_NI_COMMAND) = (NI_COMMAND_START | NI_WriteOTPKey); in HAL_NSK2_WriteOtpKey()