596     MS_U16 u16Reg, u16RegMask, u16RegShift;  in HAL_TSO_SelPad()  local
608             u16RegShift = REG_TSP5_TSOIN0_MUX_SHIFT;  in HAL_TSO_SelPad()
613             u16RegShift = REG_TSP5_TSOIN1_MUX_SHIFT;  in HAL_TSO_SelPad()
618             u16RegShift = REG_TSP5_TSOIN2_MUX_SHIFT;  in HAL_TSO_SelPad()
623             u16RegShift = REG_TSP5_MMT_MUX_SHIFT;  in HAL_TSO_SelPad()
693 …uxReg) = (TSP_TSP5_REG(u16MuxReg) & ~(u16MuxRegMask << u16RegShift)) | (u16InPadSel << u16RegShift…  in HAL_TSO_SelPad()
702 …uxReg) = (TSP_TSP5_REG(u16MuxReg) & ~(u16MuxRegMask << u16RegShift)) | (u16InPadSel << u16RegShift…  in HAL_TSO_SelPad()
709     MS_U16 u16Reg, u16RegMask, u16RegShift;  in HAL_TSO_Set_InClk()  local
720             u16RegShift = REG_CLKGEN0_TSO_IN_SHIFT;  in HAL_TSO_Set_InClk()
726             u16RegShift = REG_CLKGEN2_TSO1_IN_SHIFT;  in HAL_TSO_Set_InClk()
732             u16RegShift = REG_CLKGEN2_TSO2_IN_SHIFT;  in HAL_TSO_Set_InClk()
738             u16RegShift = REG_CLKGEN2_MMT_IN_SHIFT;  in HAL_TSO_Set_InClk()
750         u16value |= ((REG_CLKGEN2_TSO1_IN_DISABLE << u16RegShift) & 0xFFFFUL);  in HAL_TSO_Set_InClk()
759         u16value |= (u16ClkSel << u16RegShift);  in HAL_TSO_Set_InClk()
762             u16value |= ((REG_CLKGEN2_TSO1_IN_INVERT << u16RegShift) & 0xFFFFUL);  in HAL_TSO_Set_InClk()
785     MS_U16 u16Reg, u16RegMask, u16RegShift;  in HAL_TSO_GetInputTSIF_Status()  local
795             u16RegShift = REG_TSP5_TSOIN0_MUX_SHIFT;  in HAL_TSO_GetInputTSIF_Status()
800             u16RegShift = REG_TSP5_TSOIN1_MUX_SHIFT;  in HAL_TSO_GetInputTSIF_Status()
805             u16RegShift = REG_TSP5_TSOIN2_MUX_SHIFT;  in HAL_TSO_GetInputTSIF_Status()
810             u16RegShift = REG_TSP5_MMT_MUX_SHIFT;  in HAL_TSO_GetInputTSIF_Status()
816     *pu16Pad = (TSP_TSP5_REG(u16Reg) & (u16RegMask << u16RegShift)) >> u16RegShift;  in HAL_TSO_GetInputTSIF_Status()