Lines Matching refs:_u16TSOTopReg
140 static MS_U16 _u16TSOTopReg[3][8]; variable
2088 _u16TSOTopReg[0][0] = TSO_CLKGEN0_REG(REG_CLKGEN0_TSO_IN); in HAL_TSO_SaveRegs()
2089 _u16TSOTopReg[0][1] = TSO_CLKGEN0_REG(REG_CLKGEN0_TSO_OUT_PHASE); in HAL_TSO_SaveRegs()
2090 _u16TSOTopReg[0][2] = TSO_CLKGEN0_REG(REG_CLKGEN0_TSO_OUT_CLK); in HAL_TSO_SaveRegs()
2091 _u16TSOTopReg[0][3] = TSO_CLKGEN0_REG(REG_CLKGEN0_RESERVED0); in HAL_TSO_SaveRegs()
2092 _u16TSOTopReg[0][4] = TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN); in HAL_TSO_SaveRegs()
2093 _u16TSOTopReg[0][5] = TSO_CLKGEN2_REG(REG_CLKGEN2_MMT_IN); in HAL_TSO_SaveRegs()
2094 _u16TSOTopReg[0][6] = TSP_TS_SAMPLE_REG(REG_TSO_OUT_CLK_SEL); in HAL_TSO_SaveRegs()
2096 _u16TSOTopReg[1][0] = TSP_TOP_REG(REG_TOP_TSO_EVD); in HAL_TSO_SaveRegs()
2097 _u16TSOTopReg[1][1] = TSP_TOP_REG(REG_TOP_TS4_CFG); in HAL_TSO_SaveRegs()
2098 _u16TSOTopReg[1][2] = TSP_TOP_REG(REG_TOP_TS_CONFIG); in HAL_TSO_SaveRegs()
2099 _u16TSOTopReg[1][3] = TSP_TOP_REG(REG_TOP_TS2_CONFIG); in HAL_TSO_SaveRegs()
2100 _u16TSOTopReg[1][4] = TSP_TOP_REG(REG_TOP_TS3_CONFIG); in HAL_TSO_SaveRegs()
2102 _u16TSOTopReg[2][0] = TSP_TSP5_REG(REG_TSP5_TSOIN_MUX); in HAL_TSO_SaveRegs()
2103 _u16TSOTopReg[2][1] = TSP_TSP5_REG(REG_TSP5_TSOOUT_MUX); in HAL_TSO_SaveRegs()
2104 _u16TSOTopReg[2][2] = TSP_TSP5_REG(REG_TSP5_MMT_MUX); in HAL_TSO_SaveRegs()
2114 TSO_CLKGEN0_REG(REG_CLKGEN0_TSO_IN) = _u16TSOTopReg[0][0]; in HAL_TSO_RestoreRegs()
2115 TSO_CLKGEN0_REG(REG_CLKGEN0_TSO_OUT_PHASE) = _u16TSOTopReg[0][1]; in HAL_TSO_RestoreRegs()
2116 TSO_CLKGEN0_REG(REG_CLKGEN0_TSO_OUT_CLK) = _u16TSOTopReg[0][2]; in HAL_TSO_RestoreRegs()
2117 TSO_CLKGEN0_REG(REG_CLKGEN0_RESERVED0) = _u16TSOTopReg[0][3]; in HAL_TSO_RestoreRegs()
2118 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN) = _u16TSOTopReg[0][4]; in HAL_TSO_RestoreRegs()
2119 TSO_CLKGEN2_REG(REG_CLKGEN2_MMT_IN) = _u16TSOTopReg[0][5]; in HAL_TSO_RestoreRegs()
2120 TSP_TS_SAMPLE_REG(REG_TSO_OUT_CLK_SEL) = _u16TSOTopReg[0][6]; in HAL_TSO_RestoreRegs()
2122 TSP_TOP_REG(REG_TOP_TSO_EVD) = _u16TSOTopReg[1][0]; in HAL_TSO_RestoreRegs()
2123 TSP_TOP_REG(REG_TOP_TS4_CFG) = _u16TSOTopReg[1][1]; in HAL_TSO_RestoreRegs()
2124 TSP_TOP_REG(REG_TOP_TS_CONFIG) = _u16TSOTopReg[1][2] ; in HAL_TSO_RestoreRegs()
2125 TSP_TOP_REG(REG_TOP_TS2_CONFIG) = _u16TSOTopReg[1][3]; in HAL_TSO_RestoreRegs()
2126 TSP_TOP_REG(REG_TOP_TS3_CONFIG) = _u16TSOTopReg[1][4]; in HAL_TSO_RestoreRegs()
2128 TSP_TSP5_REG(REG_TSP5_TSOIN_MUX) = _u16TSOTopReg[2][0]; in HAL_TSO_RestoreRegs()
2129 TSP_TSP5_REG(REG_TSP5_TSOOUT_MUX) = _u16TSOTopReg[2][1]; in HAL_TSO_RestoreRegs()
2130 TSP_TSP5_REG(REG_TSP5_MMT_MUX) = _u16TSOTopReg[2][2]; in HAL_TSO_RestoreRegs()