Lines Matching refs:TSP_CLKGEN0_REG
216 #define TSP_CLKGEN0_REG(addr) (*((volatile MS_U16*)(_virtRegBase + 0x1600UL + ((addr)<<2UL)))) macro
2340 …u32data = TSP_CLKGEN0_REG(REG_CLKGEN0_TSN_CLK) & ~(REG_CLKGEN0_TSN_CLK_MASK<< REG_CLKGEN0_TSN_CLK_… in HAL_TSP_SelPad_ClkInv()
2342 TSP_CLKGEN0_REG(REG_CLKGEN0_TSN_CLK) = u32data; in HAL_TSP_SelPad_ClkInv()
2345 …u32data = TSP_CLKGEN0_REG(REG_CLKGEN0_TSN_CLK) & ~(REG_CLKGEN0_TSN_CLK_MASK<< REG_CLKGEN0_TSN_CLK_… in HAL_TSP_SelPad_ClkInv()
2347 TSP_CLKGEN0_REG(REG_CLKGEN0_TSN_CLK) = u32data; in HAL_TSP_SelPad_ClkInv()
2350 …u32data = TSP_CLKGEN0_REG(REG_CLKGEN0_TSN_CLK2) & ~(REG_CLKGEN0_TSN_CLK_MASK<< REG_CLKGEN0_TSN_CLK… in HAL_TSP_SelPad_ClkInv()
2352 TSP_CLKGEN0_REG(REG_CLKGEN0_TSN_CLK2) = u32data; in HAL_TSP_SelPad_ClkInv()
3521 …*pu16Clk = (TSP_CLKGEN0_REG(REG_CLKGEN0_TSN_CLK) >> REG_CLKGEN0_TSN_CLK_TS0_SHIFT) & REG_CLKGEN0… in HAL_TSP_GetTSIF_Status()
3528 …*pu16Clk = (TSP_CLKGEN0_REG(REG_CLKGEN0_TSN_CLK) >> REG_CLKGEN0_TSN_CLK_TS1_SHIFT) & REG_CLKGEN0… in HAL_TSP_GetTSIF_Status()
3535 …*pu16Clk = (TSP_CLKGEN0_REG(REG_CLKGEN0_TSN_CLK2) >> REG_CLKGEN0_TSN_CLK_TS2_SHIFT) & REG_CLKGEN… in HAL_TSP_GetTSIF_Status()
3704 … return (TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_STC_CW_L) | TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_STC_CW_H)); in HAL_TSP_GetSTCSynth()
3706 … return (TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_STC1_CW_L) | TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_STC1_CW_H)); in HAL_TSP_GetSTCSynth()
3723 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) &= ~REG_CLKGEN0_STC_CW_SEL; in HAL_TSP_SetSTCSynth()
3727 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_STC_CW_L) = (MS_U16)(u32Sync & 0xFFFF); in HAL_TSP_SetSTCSynth()
3728 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_STC_CW_H) = (MS_U16)((u32Sync >> 16UL) & 0xFFFF); in HAL_TSP_SetSTCSynth()
3731 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) &= ~REG_CLKGEN0_STC_CW_EN; in HAL_TSP_SetSTCSynth()
3732 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) |= REG_CLKGEN0_STC_CW_EN; in HAL_TSP_SetSTCSynth()
3733 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) &= ~REG_CLKGEN0_STC_CW_EN; in HAL_TSP_SetSTCSynth()
3737 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) |= REG_CLKGEN0_STC_CW_SEL; in HAL_TSP_SetSTCSynth()
3740 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) &= ~REG_CLKGEN0_STC1_CW_SEL; in HAL_TSP_SetSTCSynth()
3741 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_STC1_CW_L) = (MS_U16)(u32Sync & 0xFFFF); in HAL_TSP_SetSTCSynth()
3742 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_STC1_CW_H) = (MS_U16)((u32Sync >> 16UL) & 0xFFFF); in HAL_TSP_SetSTCSynth()
3743 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) &= ~REG_CLKGEN0_STC1_CW_EN; in HAL_TSP_SetSTCSynth()
3744 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) |= REG_CLKGEN0_STC1_CW_EN; in HAL_TSP_SetSTCSynth()
3745 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) &= ~REG_CLKGEN0_STC1_CW_EN; in HAL_TSP_SetSTCSynth()
3746 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) |= REG_CLKGEN0_STC1_CW_SEL; in HAL_TSP_SetSTCSynth()
6322 _u16ClkgenRegArray[u32ii] = TSP_CLKGEN0_REG(u32ii); in HAL_TSP_SaveRegs()
6324 _u16ClkgenRegArray[0x7c] = TSP_CLKGEN0_REG(0x7c); in HAL_TSP_SaveRegs()
6325 _u16ClkgenRegArray[0x7d] = TSP_CLKGEN0_REG(0x7d); in HAL_TSP_SaveRegs()
6326 _u16ClkgenRegArray[0x7e] = TSP_CLKGEN0_REG(0x7e); in HAL_TSP_SaveRegs()
6374 TSP_CLKGEN0_REG(u32ii) = _u16ClkgenRegArray[u32ii]; in HAL_TSP_RestoreRegs()
6376 TSP_CLKGEN0_REG(0x7c) = _u16ClkgenRegArray[0x7c]; in HAL_TSP_RestoreRegs()
6377 TSP_CLKGEN0_REG(0x7d) = _u16ClkgenRegArray[0x7d]; in HAL_TSP_RestoreRegs()
6378 TSP_CLKGEN0_REG(0x7e) = _u16ClkgenRegArray[0x7e]; in HAL_TSP_RestoreRegs()