Lines Matching refs:REG16_T
370 #define REG16_T(addr) (*((volatile MS_U16*)(addr))) macro
388 REG16_T(XBYTE_1591) = 0;
389 REG16_T(XBYTE_15A4) = 0;
390 REG16_T(XBYTE_15A6) = 0;
396 REG16_T(XBYTE_1591) = 0xFF;
397 REG16_T(XBYTE_15A4) = 0xFF;
398 while (REG16_T(XBYTE_15A4) && REG16_T(XBYTE_15A6));
399 REG16_T(XBYTE_1591) = 0xFF;
401 REG16_T(XBYTE_15A6) = 0xFF;
402 REG16_T(XBYTE_15A4) = 0x00;
403 while (REG16_T(XBYTE_1591) && (REG16_T(XBYTE_15A4)==0));
410 REG16_T(XBYTE_1591) = 0x00;
412 REG16_T(XBYTE_15A6) = 0x00;
428 REG16_T(TSP_SEM_AEON) = 0; in HAL_TSP_HW_Lock_Init()
429 REG16_T(TSP_SEM_MIPS) = 0; in HAL_TSP_HW_Lock_Init()
430 REG16_T(TSP_SEM_ORDER) = 0; in HAL_TSP_HW_Lock_Init()
441 REG16_T(TSP_SEM_AEON) = 0xFFFF; in _HAL_TSP_HW_TryLock()
442 REG16_T(TSP_SEM_ORDER) = 0xFFFF; in _HAL_TSP_HW_TryLock()
444 if (REG16_T(TSP_SEM_ORDER) && REG16_T(TSP_SEM_MIPS)) in _HAL_TSP_HW_TryLock()
455 REG16_T(TSP_SEM_MIPS) = 0xFFFF; in _HAL_TSP_HW_TryLock()
456 REG16_T(TSP_SEM_ORDER) = 0x00; in _HAL_TSP_HW_TryLock()
458 if ((REG16_T(TSP_SEM_ORDER) ==0) && (REG16_T(TSP_SEM_AEON))) in _HAL_TSP_HW_TryLock()
479 REG16_T(TSP_SEM_AEON) = 0x00; in _HAL_TSP_HW_Unlock()
483 REG16_T(TSP_SEM_MIPS) = 0x00; in _HAL_TSP_HW_Unlock()
489 REG16_T(TSP_SEM_AEON) = 0x00; in HAL_TSP_HW_Lock_Release()
490 REG16_T(TSP_SEM_MIPS) = 0x00; in HAL_TSP_HW_Lock_Release()
504 if ( REG16_T(TSP_SEM_AEON)) in HAL_TSP_TTX_IsAccess()
511 if (REG16_T(TSP_SEM_MIPS)) in HAL_TSP_TTX_IsAccess()
545 REG16_T(ADDR_INDR_ADDR0)= ((((MS_U32)reg)>> 1) & 0xFFFF); in HAL_REG32_IndR()
546 REG16_T(ADDR_INDR_ADDR1)= ((((MS_U32)reg)>> 17) & 0xFFFF); in HAL_REG32_IndR()
550 REG16_T(ADDR_INDR_CTRL)= REG16_T(ADDR_INDR_CTRL) & 0xFF00; in HAL_REG32_IndR()
551 …REG16_T(ADDR_INDR_CTRL)= REG16_T(ADDR_INDR_CTRL) | (TSP_IDR_MCUWAIT | TSP_IDR_READ | TSP_IDR_ST… in HAL_REG32_IndR()
554 u32Ret = ((MS_U32)(REG16_T(ADDR_INDR_READ0))| ((MS_U32)(REG16_T(ADDR_INDR_READ1)<< 16))); in HAL_REG32_IndR()
569 REG16_T(ADDR_INDR_ADDR0)= ((((MS_U32)reg)>> 1) & 0xFFFF); in HAL_REG32_IndR_tmp()
570 REG16_T(ADDR_INDR_ADDR1)= ((((MS_U32)reg)>> 17) & 0xFFFF); in HAL_REG32_IndR_tmp()
574 REG16_T(ADDR_INDR_CTRL)= REG16_T(ADDR_INDR_CTRL) & 0xFF00; in HAL_REG32_IndR_tmp()
575 …REG16_T(ADDR_INDR_CTRL)= REG16_T(ADDR_INDR_CTRL) | (TSP_IDR_MCUWAIT | TSP_IDR_READ | TSP_IDR_ST… in HAL_REG32_IndR_tmp()
578 u32Ret = ((MS_U32)(REG16_T(ADDR_INDR_READ0))| ((MS_U32)(REG16_T(ADDR_INDR_READ1)<< 16))); in HAL_REG32_IndR_tmp()
589 REG16_T(ADDR_INDR_ADDR0)= ((((MS_U32)reg)>> 1) & 0xFFFF); in HAL_REG32_IndW_tmp()
590 REG16_T(ADDR_INDR_ADDR1)= ((((MS_U32)reg)>> 17) & 0xFFFF); in HAL_REG32_IndW_tmp()
593 REG16_T(ADDR_INDR_WRITE0)= (value & 0xFFFF); in HAL_REG32_IndW_tmp()
594 REG16_T(ADDR_INDR_WRITE1)= ((value >> 16) & 0xFFFF); in HAL_REG32_IndW_tmp()
598 REG16_T(ADDR_INDR_CTRL)= REG16_T(ADDR_INDR_CTRL) & 0xFF00; in HAL_REG32_IndW_tmp()
599 …REG16_T(ADDR_INDR_CTRL)= REG16_T(ADDR_INDR_CTRL) | (TSP_IDR_MCUWAIT | TSP_IDR_WRITE | TSP_IDR_S… in HAL_REG32_IndW_tmp()
611 REG16_T(ADDR_INDR_ADDR0)= ((((MS_U32)reg)>> 1) & 0xFFFF); in HAL_REG32_IndW()
612 REG16_T(ADDR_INDR_ADDR1)= ((((MS_U32)reg)>> 17) & 0xFFFF); in HAL_REG32_IndW()
615 REG16_T(ADDR_INDR_WRITE0)= (value & 0xFFFF); in HAL_REG32_IndW()
616 REG16_T(ADDR_INDR_WRITE1)= ((value >> 16) & 0xFFFF); in HAL_REG32_IndW()
620 REG16_T(ADDR_INDR_CTRL)= REG16_T(ADDR_INDR_CTRL) & 0xFF00; in HAL_REG32_IndW()
621 …REG16_T(ADDR_INDR_CTRL)= REG16_T(ADDR_INDR_CTRL) | (TSP_IDR_MCUWAIT | TSP_IDR_WRITE | TSP_IDR_S… in HAL_REG32_IndW()
631 REG16_T(ADDR_HWINT2) = (REG16_T(ADDR_HWINT2) | 0xFF00) & ~u16ClrBit; in _HAL_TSP_HwInt2_BitClr()
636 REG16_T(ADDR_HWINT2) = (REG16_T(ADDR_HWINT2) | 0xFF00) | u16Bit; in _HAL_TSP_HwInt2_BitSet()
760 u16LastAddr0= (MS_U16)REG16_T(ADDR_INDR_ADDR0); in HAL_TSP_ISR_SAVE_ALL()
761 u16LastAddr1= (MS_U16)REG16_T(ADDR_INDR_ADDR1); in HAL_TSP_ISR_SAVE_ALL()
764 u16LastWrite0= (MS_U16)REG16_T(ADDR_INDR_WRITE0); in HAL_TSP_ISR_SAVE_ALL()
765 u16LastWrite1= (MS_U16)REG16_T(ADDR_INDR_WRITE1); in HAL_TSP_ISR_SAVE_ALL()
768 u16LastRead0= (MS_U16)REG16_T(ADDR_INDR_READ0); in HAL_TSP_ISR_SAVE_ALL()
769 u16LastRead1= (MS_U16)REG16_T(ADDR_INDR_READ1); in HAL_TSP_ISR_SAVE_ALL()
775 REG16_T(ADDR_INDR_READ0)= u16LastRead0; in HAL_TSP_ISR_RESTORE_ALL()
776 REG16_T(ADDR_INDR_READ1)= u16LastRead1; in HAL_TSP_ISR_RESTORE_ALL()
779 REG16_T(ADDR_INDR_WRITE0)= u16LastWrite0; in HAL_TSP_ISR_RESTORE_ALL()
780 REG16_T(ADDR_INDR_WRITE1)= u16LastWrite1; in HAL_TSP_ISR_RESTORE_ALL()
783 REG16_T(ADDR_INDR_ADDR0)= u16LastAddr0; in HAL_TSP_ISR_RESTORE_ALL()
784 REG16_T(ADDR_INDR_ADDR1)= u16LastAddr1; in HAL_TSP_ISR_RESTORE_ALL()
1170 MS_U32 u32SwIntStatus = (MS_U32)(REG16_T(ADDR_SWINT2_L) & 0xFFFF); in HAL_TSP_SW_INT_STATUS()
1171 u32SwIntStatus |= (((MS_U32)(REG16_T(ADDR_SWINT2_H) & 0xFFFF)) << 16); in HAL_TSP_SW_INT_STATUS()
1403 REG16_T(ADDR_MOBF_FILEIN) = _16MobfKey; in HAL_TSP_CmdQ_TsDma_Start()
1488 …REG16_T(ADDR_PVR_HEAD20)= (u32BufStart1>> MIU_BUS) & (TSP_HW_PVR_BUF_HEAD20_MASK >> TSP_HW_PVR_B… in HAL_TSP_PVR_SetBuffer()
1489 REG16_T(ADDR_PVR_HEAD21)= (u32BufStart1>> (MIU_BUS+ 16)) & TSP_HW_PVR_BUF_HEAD21_MASK; in HAL_TSP_PVR_SetBuffer()
1490 …REG16_T(ADDR_PVR_TAIL20)= (u32BufEnd>> MIU_BUS) & (TSP_HW_PVR_BUF_TAIL20_MASK >> TSP_HW_PVR_BUF_… in HAL_TSP_PVR_SetBuffer()
1491 REG16_T(ADDR_PVR_TAIL21)= (u32BufEnd>> (MIU_BUS+ 16)) & TSP_HW_PVR_BUF_TAIL21_MASK; in HAL_TSP_PVR_SetBuffer()
3366 REG16_T(ADDR_SWINT2_L) = 0; in HAL_TSP_Int_ClearSw()
3367 REG16_T(ADDR_SWINT2_H) = 0; in HAL_TSP_Int_ClearSw()