148 #define TSO_CLKGEN1_REG(addr)       (*((volatile MS_U16*)(_virtTSORegBase + 0x6600 + ((addr)<<2))))  macro
537             u16value = TSO_CLKGEN1_REG(u16Reg) & ~u16RegMask;  in HAL_TSO_Set_InClk()
543             u16value = TSO_CLKGEN1_REG(u16Reg) & ~u16RegMask;  in HAL_TSO_Set_InClk()
574             TSO_CLKGEN1_REG(u16Reg) = u16value;  in HAL_TSO_Set_InClk()
577             TSO_CLKGEN1_REG(u16Reg) = u16value;  in HAL_TSO_Set_InClk()
615 …u16data = (TSO_CLKGEN1_REG(REG_CLKGEN1_TSO_IN) & REG_CLKGEN1_TSO_IN_MASK) >> REG_CLKGEN1_TSO_IN_SH…  in HAL_TSO_GetInputTSIF_Status()
619 …u16data = (TSO_CLKGEN1_REG(REG_CLKGEN1_TSO1_IN) & REG_CLKGEN1_TSO1_IN_MASK) >> REG_CLKGEN1_TSO1_IN…  in HAL_TSO_GetInputTSIF_Status()
723         TSO_CLKGEN1_REG(REG_CLKGEN1_TSO_OUT_CLK) &= ~REG_CLKGEN1_TSO_OUT_PHASE_TUN_ENABLE;  in HAL_TSO_Set_TSOOut_Phase_Tune()
727 …     u16value = (TSO_CLKGEN1_REG(REG_CLKGEN1_TSO_OUT_PHASE) & ~REG_CLKGEN1_TSO_OUT_PH_TUN_NUM_MASK)  in HAL_TSO_Set_TSOOut_Phase_Tune()
730         TSO_CLKGEN1_REG(REG_CLKGEN1_TSO_OUT_PHASE) = u16value;  in HAL_TSO_Set_TSOOut_Phase_Tune()
731         TSO_CLKGEN1_REG(REG_CLKGEN1_TSO_OUT_CLK) |= REG_CLKGEN1_TSO_OUT_PHASE_TUN_ENABLE;  in HAL_TSO_Set_TSOOut_Phase_Tune()
746         TSO_CLKGEN1_REG(REG_CLKGEN1_TSO_OUT_CLK) =  in HAL_TSO_PreTsoOutClk()
747 …(TSO_CLKGEN1_REG(REG_CLKGEN1_TSO_OUT_CLK) & ~REG_CLKGEN1_TSO_OUT_PRE_OUTCLK_MASK) | (*pu16PreTsoOu…  in HAL_TSO_PreTsoOutClk()
751 …*pu16PreTsoOutSel = (TSO_CLKGEN1_REG(REG_CLKGEN1_TSO_OUT_CLK) & (REG_CLKGEN1_TSO_OUT_PRE_OUTCLK_MA…  in HAL_TSO_PreTsoOutClk()
763         TSO_CLKGEN1_REG(REG_CLKGEN1_TSO_IN) =  in HAL_TSO_TSOOutDiv()
764 …  (TSO_CLKGEN1_REG(REG_CLKGEN1_TSO_IN) & ~REG_CLKGEN0_TSO_TRACE_MASK) | REG_CLKGEN1_TSO_TRACE_216M;  in HAL_TSO_TSOOutDiv()
766         TSO_CLKGEN1_REG(REG_CLKGEN1_TSO_OUT_CLK) =  in HAL_TSO_TSOOutDiv()
767 …(TSO_CLKGEN1_REG(REG_CLKGEN1_TSO_OUT_CLK) & ~REG_CLKGEN0_TSO_OUT_DIV_SEL_MASK) | *pu16ClkOutDivSrc…  in HAL_TSO_TSOOutDiv()
769         TSO_CLKGEN1_REG(REG_CLKGEN1_TSO_OUT_PHASE) =  in HAL_TSO_TSOOutDiv()
770 …(TSO_CLKGEN1_REG(REG_CLKGEN1_TSO_OUT_PHASE) & ~REG_CLKGEN1_TSO_OUT_DIVNUM_MASK) | *pu16ClkOutDivNu…  in HAL_TSO_TSOOutDiv()
774 …*pu16ClkOutDivSrcSel = TSO_CLKGEN1_REG(REG_CLKGEN1_TSO_OUT_CLK) & REG_CLKGEN0_TSO_OUT_DIV_SEL_MASK;  in HAL_TSO_TSOOutDiv()
775 …  *pu16ClkOutDivNum = TSO_CLKGEN1_REG(REG_CLKGEN1_TSO_OUT_PHASE) & REG_CLKGEN1_TSO_OUT_DIVNUM_MASK;  in HAL_TSO_TSOOutDiv()
783     MS_U16 u16Clk = TSO_CLKGEN1_REG(REG_CLKGEN1_TSO_OUT_CLK) & ~REG_CLKGEN0_TSO_OUT_CLK_MASK;  in HAL_TSO_OutClk()
793             TSO_CLKGEN1_REG(REG_CLKGEN1_TSO_IN) =  in HAL_TSO_OutClk()
794 …  (TSO_CLKGEN1_REG(REG_CLKGEN1_TSO_IN) & ~REG_CLKGEN0_TSO_TRACE_MASK) | REG_CLKGEN1_TSO_TRACE_216M;  in HAL_TSO_OutClk()
802         TSO_CLKGEN1_REG(REG_CLKGEN1_TSO_OUT_CLK) = u16Clk;  in HAL_TSO_OutClk()
806         *pbEnable = TSO_CLKGEN1_REG(REG_CLKGEN1_TSO_OUT_CLK) & REG_CLKGEN1_TSO_OUT_CLK_DISABLE;  in HAL_TSO_OutClk()
807         *pbClkInvert = TSO_CLKGEN1_REG(REG_CLKGEN1_TSO_OUT_CLK) & REG_CLKGEN1_TSO_OUT_CLK_INVERT;  in HAL_TSO_OutClk()
808 …*pu16ClkOutSel = TSO_CLKGEN1_REG(REG_CLKGEN1_TSO_OUT_CLK) & ~(REG_CLKGEN1_TSO_OUT_CLK_INVERT | REG…  in HAL_TSO_OutClk()