Lines Matching refs:Reg
158 REG32* Reg = NULL; in HAL_MMFI_PidFlt_Set() local
162 Reg = &(_MFCtrl[u8Eng].PidFlt[u8Idx]); in HAL_MMFI_PidFlt_Set()
166 Reg = &(_MFCtrl2[0].PidFlt[u8Eng][u8Idx - MMFI_PIDFLT_GROUP0]); in HAL_MMFI_PidFlt_Set()
169 _HAL_REG32_W(Reg, (MS_U32)u16PID | u32entype); in HAL_MMFI_PidFlt_Set()
175 REG32* Reg = NULL; in HAL_MMFI_PidFlt_SetPid() local
179 Reg = &(_MFCtrl[u8Eng].PidFlt[u8Idx]); in HAL_MMFI_PidFlt_SetPid()
183 Reg = &(_MFCtrl2[0].PidFlt[u8Eng][u8Idx - MMFI_PIDFLT_GROUP0]); in HAL_MMFI_PidFlt_SetPid()
186 u32data = (_HAL_REG32_R(Reg) & ~MMFI_PIDFLT_PID_MASK) | (MS_U32)u16PID; in HAL_MMFI_PidFlt_SetPid()
187 _HAL_REG32_W(Reg, u32data); in HAL_MMFI_PidFlt_SetPid()
193 REG32* Reg = NULL; in HAL_MMFI_PidFlt_Enable() local
197 Reg = &(_MFCtrl[u8Eng].PidFlt[u8Idx]); in HAL_MMFI_PidFlt_Enable()
201 Reg = &(_MFCtrl2[0].PidFlt[u8Eng][u8Idx - MMFI_PIDFLT_GROUP0]); in HAL_MMFI_PidFlt_Enable()
204 u32data = _HAL_REG32_R(Reg) & ~MMFI_PIDFLT_EN_MASK; in HAL_MMFI_PidFlt_Enable()
209 _HAL_REG32_W(Reg, u32data); in HAL_MMFI_PidFlt_Enable()
214 REG32* Reg = NULL; in HAL_MMFI_PidFlt_Reset() local
218 Reg = &(_MFCtrl[u8Eng].PidFlt[u8Idx]); in HAL_MMFI_PidFlt_Reset()
222 Reg = &(_MFCtrl2[0].PidFlt[u8Eng][u8Idx - MMFI_PIDFLT_GROUP0]); in HAL_MMFI_PidFlt_Reset()
225 _HAL_REG32_W(Reg, MMFI_PID_NULL); in HAL_MMFI_PidFlt_Reset()