Lines Matching refs:_virtRegBase
129 static MS_VIRT _virtRegBase = 0; variable
195 #define TSP_INT_REG(addr) (*((volatile MS_U16*)(_virtRegBase + 0x3200UL + ((addr)<<2UL))))
197 #define TSP_CLKGEN0_REG(addr) (*((volatile MS_U16*)(_virtRegBase + 0x1600UL + ((addr)<<2UL))))
253 #define TSP_CLKGEN2_REG(addr) (*((volatile MS_U16*)(_virtRegBase + 0x1400UL + ((addr)<<2UL))))
300 #define TSP_TOP_REG(addr) (*((volatile MS_U16*)(_virtRegBase + 0x3c00UL + ((addr)<<2UL))))
375 #define TSP_TSO0_REG(addr) (*((volatile MS_U16*)(_virtRegBase + 0x27400UL + ((addr)<<2UL)…
386 #define TSP_TS_SAMPLE_REG(addr) (*((volatile MS_U16*)(_virtRegBase + 0x21400 + ((addr)<<2))))
489 #define ADDR_INDR_CTRL (_virtRegBase+ 0x2b20UL)
490 #define ADDR_INDR_ADDR0 (_virtRegBase+ 0x2b24UL)
491 #define ADDR_INDR_ADDR1 (_virtRegBase+ 0x2b28UL)
492 #define ADDR_INDR_WRITE0 (_virtRegBase+ 0x2b2cUL)
493 #define ADDR_INDR_WRITE1 (_virtRegBase+ 0x2b30UL)
494 #define ADDR_INDR_READ0 (_virtRegBase+ 0x2b34UL)
495 #define ADDR_INDR_READ1 (_virtRegBase+ 0x2b38UL)
497 #define ADDR_MOBF_FILEIN (_virtRegBase+ 0x2a2cUL)
500 #define XBYTE_1591 (_virtRegBase+ 0x2a0cUL) // TsRec_Head21_Mid20
501 #define XBYTE_15A4 (_virtRegBase+ 0x2a10UL) // TsRec_Mid21_Tail20
502 #define XBYTE_15A6 (_virtRegBase+ 0x2b48UL) // TsRec_Mid
540 #define TSP_SEM_AEON (_virtRegBase+ 0x2a34UL) //sw_mail_box0
541 #define TSP_SEM_ORDER (_virtRegBase+ 0x2b58UL) // sw_mail_box1
542 #define TSP_SEM_MIPS (_virtRegBase+ 0x2b5cUL) // sw_mail_box2
753 #define ADDR_HWINT2 (_virtRegBase+ 0x2db0UL)
1176 #define ADDR_SWINT2_L (_virtRegBase+ 0x2db4UL)
1177 #define ADDR_SWINT2_H (_virtRegBase+ 0x2db8UL)
1511 #define ADDR_PVR_HEAD20 (_virtRegBase+ 0x2a04UL) in HAL_TSP_PVR_SetBuffer()
1512 #define ADDR_PVR_HEAD21 (_virtRegBase+ 0x2a08UL) in HAL_TSP_PVR_SetBuffer()
1513 #define ADDR_PVR_MID20 (_virtRegBase+ 0x2a0cUL) in HAL_TSP_PVR_SetBuffer()
1514 #define ADDR_PVR_MID21 (_virtRegBase+ 0x2a10UL) in HAL_TSP_PVR_SetBuffer()
1515 #define ADDR_PVR_TAIL20 (_virtRegBase+ 0x2a14UL) in HAL_TSP_PVR_SetBuffer()
1516 #define ADDR_PVR_TAIL21 (_virtRegBase+ 0x2a18UL) in HAL_TSP_PVR_SetBuffer()
2983 _virtRegBase = virtBankAddr; in HAL_TSP_SetBank()
2985 _TspCtrl = (REG_Ctrl*)(_virtRegBase + REG_CTRL_BASE); in HAL_TSP_SetBank()
2986 _TspCtrl2 = (REG_Ctrl2*)(_virtRegBase + REG_CTRL_MMFIBASE); in HAL_TSP_SetBank()
2987 _TspCtrl3 = (REG_Ctrl3*)(_virtRegBase + REG_CTRL_TSP3); in HAL_TSP_SetBank()
2988 _TspCtrl4 = (REG_Ctrl4*)(_virtRegBase + REG_CTRL_TSP4); in HAL_TSP_SetBank()
2989 _TspCtrl5 = (REG_Ctrl5*)(_virtRegBase + REG_CTRL_TSP5); in HAL_TSP_SetBank()
2990 _TspSample = (REG_TS_Sample*)(_virtRegBase + REG_CTRL_TS_SAMPLE); in HAL_TSP_SetBank()
3690 #define ADDR_SWINT2_L (_virtRegBase+ 0x2db4UL)
3691 #define ADDR_SWINT2_H (_virtRegBase+ 0x2db8UL)
4231 _HAL_REG32L_W((REG32_L *)(_virtRegBase+CKG_TSP_STC0), in HAL_TSP_PowerCtrl()
4232 …RESET_FLAG1(_HAL_REG32L_R((REG32_L *)(_virtRegBase+CKG_TSP_STC0)), (CLK_TSP_DISABLE|CLK_TSP_INVERT… in HAL_TSP_PowerCtrl()
4235 …_HAL_REG32L_W((REG32_L *)(_virtRegBase+CHIP_TSP_BOOT_CLK_SEL), RESET_FLAG1(_HAL_REG32L_R((REG32_L … in HAL_TSP_PowerCtrl()
4241 _HAL_REG32L_W((REG32_L *)(_virtRegBase+CKG_TSP_STC0), in HAL_TSP_PowerCtrl()
4242 …RESET_FLAG1(_HAL_REG32L_R((REG32_L *)(_virtRegBase+CKG_TSP_STC0)), (CLK_PAR_DISABLE|CLK_PAR_INVERT… in HAL_TSP_PowerCtrl()
4245 _HAL_REG32L_W((REG32_L *)(_virtRegBase+CKG_TS0_TS1), in HAL_TSP_PowerCtrl()
4246 …RESET_FLAG1(_HAL_REG32L_R((REG32_L *)(_virtRegBase+CKG_TS0_TS1)), (CLK_TS0_DISABLE|CLK_TS0_INVERT|… in HAL_TSP_PowerCtrl()
4249 _HAL_REG32L_W((REG32_L *)(_virtRegBase+CKG_TS0_TS1), in HAL_TSP_PowerCtrl()
4250 …RESET_FLAG1(_HAL_REG32L_R((REG32_L *)(_virtRegBase+CKG_TS0_TS1)), (CLK_TS1_DISABLE|CLK_TS1_INVERT|… in HAL_TSP_PowerCtrl()
4253 _HAL_REG32L_W((REG32_L *)(_virtRegBase+CKG_TS2_TSGP), in HAL_TSP_PowerCtrl()
4254 …RESET_FLAG1(_HAL_REG32L_R((REG32_L *)(_virtRegBase+CKG_TS2_TSGP)), (CLK_TS2_DISABLE|CLK_TS2_INVERT… in HAL_TSP_PowerCtrl()
4257 _HAL_REG32L_W((REG32_L *)(_virtRegBase+CKG2_TSP_TSFI), in HAL_TSP_PowerCtrl()
4258 …RESET_FLAG1(_HAL_REG32L_R((REG32_L *)(_virtRegBase+CKG2_TSP_TSFI)), (CKG2_TSP_TSFI_DISABKE|CKG2_TS… in HAL_TSP_PowerCtrl()
4261 _HAL_REG32L_W((REG32_L *)(_virtRegBase+CKG_TSP_STAMP), in HAL_TSP_PowerCtrl()
4262 …SET_FLAG1(_HAL_REG32L_R((REG32_L *)(_virtRegBase+CKG_TSP_STAMP)), (CLK_SYN_STC0_432M|CLK_SYN_STC1_… in HAL_TSP_PowerCtrl()
4265 _HAL_REG32L_W((REG32_L *)(_virtRegBase+CKG_TSP_STC0), in HAL_TSP_PowerCtrl()
4266 …RESET_FLAG1(_HAL_REG32L_R((REG32_L *)(_virtRegBase+CKG_TSP_STC0)), (CLK_STC_DISABLE|CLK_STC_INVERT… in HAL_TSP_PowerCtrl()
4269 _HAL_REG32L_W((REG32_L *)(_virtRegBase+CKG_TSP_STC0), in HAL_TSP_PowerCtrl()
4270 …RESET_FLAG1(_HAL_REG32L_R((REG32_L *)(_virtRegBase+CKG_TSP_STC0)), (CLK_STC1_DISABLE|CLK_STC1_INVE… in HAL_TSP_PowerCtrl()
4273 _HAL_REG32L_W((REG32_L *)(_virtRegBase+CKG_TSP_STAMP), in HAL_TSP_PowerCtrl()
4274 …RESET_FLAG1(_HAL_REG32L_R((REG32_L *)(_virtRegBase+CKG_TSP_STAMP)), (CLK_STAM_DISABLE|CLK_STAM_INV… in HAL_TSP_PowerCtrl()
4277 _HAL_REG32L_W((REG32_L *)(_virtRegBase+CKG2_TSP_TS_SAMPLE), in HAL_TSP_PowerCtrl()
4278 …RESET_FLAG1(_HAL_REG32L_R((REG32_L *)(_virtRegBase+CKG2_TSP_TS_SAMPLE)), (CKG2_TSP_TS_SAMPLE_DISAB… in HAL_TSP_PowerCtrl()
4283 …_HAL_REG32L_W((REG32_L *)(_virtRegBase+CKG_TSP_STC0), SET_FLAG1(_HAL_REG32L_R((REG32_L *)(_virtReg… in HAL_TSP_PowerCtrl()
4286 …_HAL_REG32L_W((REG32_L *)(_virtRegBase+CKG_TS0_TS1), SET_FLAG1(_HAL_REG32L_R((REG32_L *)(_virtRegB… in HAL_TSP_PowerCtrl()
4289 …_HAL_REG32L_W((REG32_L *)(_virtRegBase+CKG_TS0_TS1), SET_FLAG1(_HAL_REG32L_R((REG32_L *)(_virtRegB… in HAL_TSP_PowerCtrl()
4292 …_HAL_REG32L_W((REG32_L *)(_virtRegBase+CKG_TS2_TSGP), SET_FLAG1(_HAL_REG32L_R((REG32_L *)(_virtReg… in HAL_TSP_PowerCtrl()
4295 …_HAL_REG32L_W((REG32_L *)(_virtRegBase+CKG2_TSP_TSFI), SET_FLAG1(_HAL_REG32L_R((REG32_L *)(_virtRe… in HAL_TSP_PowerCtrl()
4298 …_HAL_REG32L_W((REG32_L *)(_virtRegBase+CKG_TSP_STC0), SET_FLAG1(_HAL_REG32L_R((REG32_L *)(_virtReg… in HAL_TSP_PowerCtrl()
4301 …_HAL_REG32L_W((REG32_L *)(_virtRegBase+CKG_TSP_STC0), SET_FLAG1(_HAL_REG32L_R((REG32_L *)(_virtReg… in HAL_TSP_PowerCtrl()
4304 …_HAL_REG32L_W((REG32_L *)(_virtRegBase+CKG_TSP_STC0), SET_FLAG1(_HAL_REG32L_R((REG32_L *)(_virtReg… in HAL_TSP_PowerCtrl()
4307 …_HAL_REG32L_W((REG32_L *)(_virtRegBase+CKG_TSP_STAMP), SET_FLAG1(_HAL_REG32L_R((REG32_L *)(_virtRe… in HAL_TSP_PowerCtrl()
4310 …_HAL_REG32L_W((REG32_L *)(_virtRegBase+CKG2_TSP_TS_SAMPLE), SET_FLAG1(_HAL_REG32L_R((REG32_L *)(_v… in HAL_TSP_PowerCtrl()