197 #define TSP_CLKGEN0_REG(addr)       (*((volatile MS_U16*)(_virtRegBase + 0x1600UL + ((addr)<<2UL))))  macro
2194 …u32data = TSP_CLKGEN0_REG(REG_CLKGEN0_TSN_CLK) & ~(REG_CLKGEN0_TSN_CLK_MASK<< REG_CLKGEN0_TSN_CLK_…  in HAL_TSP_SelPad_ClkInv()
2196             TSP_CLKGEN0_REG(REG_CLKGEN0_TSN_CLK) = u32data;  in HAL_TSP_SelPad_ClkInv()
2199 …u32data = TSP_CLKGEN0_REG(REG_CLKGEN0_TSN_CLK) & ~(REG_CLKGEN0_TSN_CLK_MASK<< REG_CLKGEN0_TSN_CLK_…  in HAL_TSP_SelPad_ClkInv()
2201             TSP_CLKGEN0_REG(REG_CLKGEN0_TSN_CLK) = u32data;  in HAL_TSP_SelPad_ClkInv()
2204 …u32data = TSP_CLKGEN0_REG(REG_CLKGEN0_TSN_CLK2) & ~(REG_CLKGEN0_TSN_CLK_MASK<< REG_CLKGEN0_TSN_CLK…  in HAL_TSP_SelPad_ClkInv()
2206             TSP_CLKGEN0_REG(REG_CLKGEN0_TSN_CLK2) = u32data;  in HAL_TSP_SelPad_ClkInv()
3230 …*pu16Clk   = (TSP_CLKGEN0_REG(REG_CLKGEN0_TSN_CLK) >> REG_CLKGEN0_TSN_CLK_TS0_SHIFT) & REG_CLKGEN0…  in HAL_TSP_GetTSIF_Status()
3237 …*pu16Clk   = (TSP_CLKGEN0_REG(REG_CLKGEN0_TSN_CLK) >> REG_CLKGEN0_TSN_CLK_TS1_SHIFT) & REG_CLKGEN0…  in HAL_TSP_GetTSIF_Status()
3244 …*pu16Clk   = (TSP_CLKGEN0_REG(REG_CLKGEN0_TSN_CLK2) >> REG_CLKGEN0_TSN_CLK_TS2_SHIFT) & REG_CLKGEN…  in HAL_TSP_GetTSIF_Status()
3389     TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) &= ~u32value;  in HAL_TSP_Stc_ctrl()
3394     TSP_CLKGEN0_REG(u32value) = (MS_U16)(u32Sync & 0xFFFF);  in HAL_TSP_Stc_ctrl()
3396     TSP_CLKGEN0_REG(u32value) = (MS_U16)(u32Sync >> 16UL);  in HAL_TSP_Stc_ctrl()
3400     TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) &= ~u32value;  in HAL_TSP_Stc_ctrl()
3401     TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) |= u32value;  in HAL_TSP_Stc_ctrl()
3402     TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) &= ~u32value;  in HAL_TSP_Stc_ctrl()
3407     TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) |= u32value;  in HAL_TSP_Stc_ctrl()
3426     u32sync = (MS_U32)TSP_CLKGEN0_REG(u32value);  in HAL_TSP_GetSTCSynth()
3428     u32sync |= (((MS_U32)TSP_CLKGEN0_REG(u32value)) << 16UL);  in HAL_TSP_GetSTCSynth()