Lines Matching refs:u16Clk
303 MS_BOOL HAL_TSO_3WirePadMapping(MS_U8 u8Pad3WireId, MS_U16 *u16Pad, MS_U16 *u16Clk) in HAL_TSO_3WirePadMapping() argument
309 *u16Clk = TSO_CLKIN_TS3; in HAL_TSO_3WirePadMapping()
313 *u16Clk = TSO_CLKIN_TS4; in HAL_TSO_3WirePadMapping()
317 *u16Clk = TSO_CLKIN_TS5; in HAL_TSO_3WirePadMapping()
321 *u16Clk = TSO_CLKIN_TS6; in HAL_TSO_3WirePadMapping()
788 MS_U16 u16Clk = TSO_CLKGEN0_REG(REG_CLKGEN0_TSO_OUT_CLK) & ~REG_CLKGEN0_TSO_OUT_CLK_MASK; in HAL_TSO_OutClk() local
794 u16Clk |= REG_CLKGEN0_TSO_OUT_CLK_DISABLE; in HAL_TSO_OutClk()
803 u16Clk |= (*pu16ClkOutSel << REG_CLKGEN0_TSO_OUT_CLK_SRC_SHIFT); in HAL_TSO_OutClk()
807 u16Clk |= REG_CLKGEN0_TSO_OUT_CLK_INVERT; in HAL_TSO_OutClk()
810 TSO_CLKGEN0_REG(REG_CLKGEN0_TSO_OUT_CLK) = u16Clk; in HAL_TSO_OutClk()
866 *pbEnable = ((u16Clk & REG_CLKGEN0_TSO_OUT_CLK_DISABLE) == 0); in HAL_TSO_OutClk()
867 … *pbClkInvert = ((u16Clk & REG_CLKGEN0_TSO_OUT_CLK_INVERT) == REG_CLKGEN0_TSO_OUT_CLK_INVERT); in HAL_TSO_OutClk()
868 *pu16ClkOutSel = u16Clk >> REG_CLKGEN0_TSO_OUT_CLK_SRC_SHIFT; in HAL_TSO_OutClk()