Lines Matching refs:_TSOCtrl
45 static REG_Ctrl_TSO* _TSOCtrl = NULL; variable
226 _TSOCtrl = (REG_Ctrl_TSO*)(_u32TSORegBase+ REG_CTRL_BASE_TSO); // 0x1706 in HAL_TSO_SetBank()
246 _REG16_SET(&(_TSOCtrl->TSO_CONFIG5), TSO_CONFIG5_FIXED_MIU_REG_FLUSH); in HAL_TSO_Init()
252 _REG16_CLR(&(_TSOCtrl->SW_RSTZ), TSO_SW_RSTZ);//low active in HAL_TSO_Reset_All()
253 _REG16_SET(&(_TSOCtrl->SW_RSTZ), TSO_SW_RSTZ); in HAL_TSO_Reset_All()
255 _REG16_SET(&(_TSOCtrl->SW_RSTZ), TSO_SW_RST_ALL | TSO_SW_RST_ALL1); in HAL_TSO_Reset_All()
256 _REG16_CLR(&(_TSOCtrl->SW_RSTZ), TSO_SW_RST_ALL | TSO_SW_RST_ALL1); in HAL_TSO_Reset_All()
270 … _HAL_REG16_W(&(_TSOCtrl[u8Eng].SW_RSTZ), (_HAL_REG16_R(&(_TSOCtrl[u8Eng].SW_RSTZ)) | u16RstItem)); in HAL_TSO_Reset_SubItem()
271 …_HAL_REG16_W(&(_TSOCtrl[u8Eng].SW_RSTZ), (_HAL_REG16_R(&(_TSOCtrl[u8Eng].SW_RSTZ)) & ~u16RstItem)); in HAL_TSO_Reset_SubItem()
276 REG16_TSO *reg = (u8Eng == 0)? &(_TSOCtrl->INTERRUPT) : &(_TSOCtrl->INTERRUPT1); in HAL_TSO_HWInt_Enable()
291 REG16_TSO *reg = (u8Eng == 0)? &(_TSOCtrl->INTERRUPT) : &(_TSOCtrl->INTERRUPT1); in HAL_TSO_HWInt_Clear()
298 REG16_TSO *reg = (u8Eng == 0)? &(_TSOCtrl->INTERRUPT) : &(_TSOCtrl->INTERRUPT1); in HAL_TSO_HWInt_Status()
425 reg16 = &(_TSOCtrl->CHANNEL0_IF1_CONFIG2); in HAL_TSO_GetInputTSIF_Status()
429 reg16 = &(_TSOCtrl->CHANNEL0_IF2_CONFIG2); in HAL_TSO_GetInputTSIF_Status()
433 reg16 = &(_TSOCtrl->CHANNEL0_IF3_CONFIG2); in HAL_TSO_GetInputTSIF_Status()
437 reg16 = &(_TSOCtrl->CHANNEL0_IF4_CONFIG2); in HAL_TSO_GetInputTSIF_Status()
441 reg16 = &(_TSOCtrl->CHANNEL0_IF5_CONFIG2); in HAL_TSO_GetInputTSIF_Status()
445 reg16 = &(_TSOCtrl->CHANNEL0_IF6_CONFIG2); in HAL_TSO_GetInputTSIF_Status()
881 _REG16_SET(&(_TSOCtrl->CHANNEL0_IF1_CONFIG2),TSO_CHCFG_PIDFLT_REC_ALL); in HAL_TSO_Set_PidBypass()
884 … _REG16_SET(&(_TSOCtrl->CHANNEL0_IF2_CONFIG2),TSO_CHANNEL0_IF2_CONFIG2_PIDFLT_REC_ALL); in HAL_TSO_Set_PidBypass()
887 … _REG16_SET(&(_TSOCtrl->CHANNEL0_IF3_CONFIG2),TSO_CHANNEL0_IF3_CONFIG2_PIDFLT_REC_ALL); in HAL_TSO_Set_PidBypass()
890 … _REG16_SET(&(_TSOCtrl->CHANNEL0_IF4_CONFIG2),TSO_CHANNEL0_IF4_CONFIG2_PIDFLT_REC_ALL); in HAL_TSO_Set_PidBypass()
893 … _REG16_SET(&(_TSOCtrl->CHANNEL0_IF5_CONFIG2),TSO_CHANNEL0_IF5_CONFIG2_PIDFLT_REC_ALL); in HAL_TSO_Set_PidBypass()
896 … _REG16_SET(&(_TSOCtrl->CHANNEL0_IF6_CONFIG2),TSO_CHANNEL0_IF6_CONFIG2_PIDFLT_REC_ALL); in HAL_TSO_Set_PidBypass()
908 _REG16_CLR(&(_TSOCtrl->CHANNEL0_IF1_CONFIG2),TSO_CHCFG_PIDFLT_REC_ALL); in HAL_TSO_Set_PidBypass()
911 … _REG16_CLR(&(_TSOCtrl->CHANNEL0_IF2_CONFIG2),TSO_CHANNEL0_IF2_CONFIG2_PIDFLT_REC_ALL); in HAL_TSO_Set_PidBypass()
914 … _REG16_CLR(&(_TSOCtrl->CHANNEL0_IF3_CONFIG2),TSO_CHANNEL0_IF3_CONFIG2_PIDFLT_REC_ALL); in HAL_TSO_Set_PidBypass()
917 … _REG16_CLR(&(_TSOCtrl->CHANNEL0_IF4_CONFIG2),TSO_CHANNEL0_IF4_CONFIG2_PIDFLT_REC_ALL); in HAL_TSO_Set_PidBypass()
920 … _REG16_CLR(&(_TSOCtrl->CHANNEL0_IF5_CONFIG2),TSO_CHANNEL0_IF5_CONFIG2_PIDFLT_REC_ALL); in HAL_TSO_Set_PidBypass()
923 … _REG16_CLR(&(_TSOCtrl->CHANNEL0_IF6_CONFIG2),TSO_CHANNEL0_IF6_CONFIG2_PIDFLT_REC_ALL); in HAL_TSO_Set_PidBypass()
942 _HAL_REG16_W(&(_TSOCtrl->PDTABLE_ADDR_L), (u32Addr & 0x0000FFFF)); in _HAL_TSO_PageTableIndW()
943 _HAL_REG16_W(&(_TSOCtrl->PDTABLE_ADDR_H), (u32Addr >> 16)); in _HAL_TSO_PageTableIndW()
946 _HAL_REG16_W(&(_TSOCtrl->PDTABLE_WDATA_L), u16Wdata); in _HAL_TSO_PageTableIndW()
947 _HAL_REG16_W(&(_TSOCtrl->PDTABLE_WDATA_H), 0x0000); in _HAL_TSO_PageTableIndW()
950 _HAL_REG16_W(&(_TSOCtrl->PDTABLE_EN), TSO_PDTABLE_W_EN); in _HAL_TSO_PageTableIndW()
956 _HAL_REG16_W(&(_TSOCtrl->PDTABLE_ADDR_L), (u32Addr & 0x0000FFFF)); in _HAL_TSO_PageTableIndR()
957 _HAL_REG16_W(&(_TSOCtrl->PDTABLE_ADDR_H), (u32Addr >> 16)); in _HAL_TSO_PageTableIndR()
960 _HAL_REG16_W(&(_TSOCtrl->PDTABLE_EN), TSO_PDTABLE_R_EN); in _HAL_TSO_PageTableIndR()
963 return _HAL_REG16_R(&(_TSOCtrl->PDTABLE_RDATA)); in _HAL_TSO_PageTableIndR()
977 …REG32_TSO *FileInRaddr = (u8FileEng == 0)? &(_TSOCtrl->CFG_TSO_60_63[0]) : &(_TSOCtrl->CFG_TSO_65_… in HAL_TSO_Set_Filein_ReadAddr()
984 …REG32_TSO *FileInRlen = (u8FileEng == 0)? &(_TSOCtrl->CFG_TSO_60_63[1]) : &(_TSOCtrl->CFG_TSO_65_6… in HAL_TSO_Set_Filein_ReadLen()
992 …REG32_TSO *TSO2MI_RADDR = (u8FileEng == 0)? &(_TSOCtrl->TSO2MI_RADDR) : &(_TSOCtrl->TSO2MI_RADDR1); in HAL_TSO_Get_Filein_ReadAddr()
993 …REG16_TSO *FILE_CONFIG = (u8FileEng == 0)? &(_TSOCtrl->TSO_FILE_CONFIG) : &(_TSOCtrl->TSO_FILE_CON… in HAL_TSO_Get_Filein_ReadAddr()
1005 …REG16_TSO *FileinCtrl = (u8FileEng == 0)? &(_TSOCtrl->TSO_Filein_Ctrl) : &(_TSOCtrl->TSO_Filein_Ct… in HAL_TSO_Set_Filein_Ctrl()
1012 …REG16_TSO *FileinCtrl = (u8FileEng == 0)? &(_TSOCtrl->TSO_Filein_Ctrl) : &(_TSOCtrl->TSO_Filein_Ct… in HAL_TSO_Get_Filein_Ctrl()
1029 … REG16_TSO *pReg = (u8FileEng == 0)? &(_TSOCtrl->TSO_FILE_CONFIG) : &(_TSOCtrl->TSO_FILE_CONFIG1); in HAL_TSO_FileinTimer_Enable()
1043 _HAL_REG16_W(&(_TSOCtrl->FILE_TIMER[u8FileEng]), u16timer); in HAL_TSO_Filein_Rate()
1048 …REG16_TSO *FILE_CONFIG = (u8FileEng == 0)? &(_TSOCtrl->TSO_FILE_CONFIG) : &(_TSOCtrl->TSO_FILE_CON… in HAL_TSO_Filein_192Mode_Enable()
1062 …REG16_TSO *FILE_CONFIG = (u8FileEng == 0)? &(_TSOCtrl->TSO_FILE_CONFIG) : &(_TSOCtrl->TSO_FILE_CON… in HAL_TSO_Filein_192BlockMode_Enable()
1079 return ((_HAL_REG16_R(&(_TSOCtrl[u8Eng].CMD_QUEUE_STATUS)) & u16Mask) >> u16Shift); in HAL_TSO_CmdQ_FIFO_Get_WRCnt()
1101 return (MS_U8)((_HAL_REG16_R(&(_TSOCtrl[u8Eng].CMD_QUEUE_STATUS)) & u16Mask) >> u16Shift); in HAL_TSO_CmdQ_FIFO_Get_WRLevel()
1108 _HAL_REG16_W(&(_TSOCtrl->SW_RSTZ), SET_FLAG1(_HAL_REG16_R(&(_TSOCtrl->SW_RSTZ)), u16data)); in HAL_TSO_CmdQ_Reset()
1109 _HAL_REG16_W(&(_TSOCtrl->SW_RSTZ), RESET_FLAG1(_HAL_REG16_R(&(_TSOCtrl->SW_RSTZ)), u16data)); in HAL_TSO_CmdQ_Reset()
1135 MS_U16 u16data = _HAL_REG16_R(&(_TSOCtrl->TSO_CONFIG1)); in HAL_TSO_Cfg1_Enable()
1146 _HAL_REG16_W(&(_TSOCtrl->TSO_CONFIG1), (u16data | TSO_CFG1_PKT_PARAM_LD)); in HAL_TSO_Cfg1_Enable()
1147 _REG16_CLR(&(_TSOCtrl->TSO_CONFIG1), TSO_CFG1_PKT_PARAM_LD); in HAL_TSO_Cfg1_Enable()
1155 _REG16_SET(&(_TSOCtrl[u8Eng].CLR_BYTE_CNT),TSO_CLR_BYTE_CNT_1); in HAL_TSO_ChIf_ClrByteCnt()
1156 _REG16_CLR(&(_TSOCtrl[u8Eng].CLR_BYTE_CNT),TSO_CLR_BYTE_CNT_1); in HAL_TSO_ChIf_ClrByteCnt()
1159 _REG16_SET(&(_TSOCtrl[u8Eng].CLR_BYTE_CNT),TSO_CLR_BYTE_CNT_2); in HAL_TSO_ChIf_ClrByteCnt()
1160 _REG16_CLR(&(_TSOCtrl[u8Eng].CLR_BYTE_CNT),TSO_CLR_BYTE_CNT_2); in HAL_TSO_ChIf_ClrByteCnt()
1163 _REG16_SET(&(_TSOCtrl[u8Eng].CLR_BYTE_CNT),TSO_CLR_BYTE_CNT_3); in HAL_TSO_ChIf_ClrByteCnt()
1164 _REG16_CLR(&(_TSOCtrl[u8Eng].CLR_BYTE_CNT),TSO_CLR_BYTE_CNT_3); in HAL_TSO_ChIf_ClrByteCnt()
1167 _REG16_SET(&(_TSOCtrl[u8Eng].CLR_BYTE_CNT),TSO_CLR_BYTE_CNT_4); in HAL_TSO_ChIf_ClrByteCnt()
1168 _REG16_CLR(&(_TSOCtrl[u8Eng].CLR_BYTE_CNT),TSO_CLR_BYTE_CNT_4); in HAL_TSO_ChIf_ClrByteCnt()
1171 _REG16_SET(&(_TSOCtrl[u8Eng].CLR_BYTE_CNT),TSO_CLR_BYTE_CNT_5); in HAL_TSO_ChIf_ClrByteCnt()
1172 _REG16_CLR(&(_TSOCtrl[u8Eng].CLR_BYTE_CNT),TSO_CLR_BYTE_CNT_5); in HAL_TSO_ChIf_ClrByteCnt()
1175 _REG16_SET(&(_TSOCtrl[u8Eng].CLR_BYTE_CNT),TSO_CLR_BYTE_CNT_6); in HAL_TSO_ChIf_ClrByteCnt()
1176 _REG16_CLR(&(_TSOCtrl[u8Eng].CLR_BYTE_CNT),TSO_CLR_BYTE_CNT_6); in HAL_TSO_ChIf_ClrByteCnt()
1222 reg = &(_TSOCtrl->CHANNEL0_IF1_CONFIG2); in HAL_TSO_ChIf_Cfg()
1225 reg = &(_TSOCtrl->CHANNEL0_IF2_CONFIG2); in HAL_TSO_ChIf_Cfg()
1228 reg = &(_TSOCtrl->CHANNEL0_IF3_CONFIG2); in HAL_TSO_ChIf_Cfg()
1231 reg = &(_TSOCtrl->CHANNEL0_IF4_CONFIG2); in HAL_TSO_ChIf_Cfg()
1234 reg = &(_TSOCtrl->CHANNEL0_IF5_CONFIG2); in HAL_TSO_ChIf_Cfg()
1237 reg = &(_TSOCtrl->CHANNEL0_IF6_CONFIG2); in HAL_TSO_ChIf_Cfg()
1269 pReg = &(_TSOCtrl->CHANNEL0_IF1_CONFIG2); in HAL_TSO_Get_ChIf_Cfg()
1272 pReg = &(_TSOCtrl->CHANNEL0_IF2_CONFIG2); in HAL_TSO_Get_ChIf_Cfg()
1275 pReg = &(_TSOCtrl->CHANNEL0_IF3_CONFIG2); in HAL_TSO_Get_ChIf_Cfg()
1278 pReg = &(_TSOCtrl->CHANNEL0_IF4_CONFIG2); in HAL_TSO_Get_ChIf_Cfg()
1281 pReg = &(_TSOCtrl->CHANNEL0_IF5_CONFIG2); in HAL_TSO_Get_ChIf_Cfg()
1284 pReg = &(_TSOCtrl->CHANNEL0_IF6_CONFIG2); in HAL_TSO_Get_ChIf_Cfg()
1314 *pbEnable = ((_HAL_REG16_R(&(_TSOCtrl->TSO_CONFIG1)) & u16data) == u16data); in HAL_TSO_Get_ChIf_Cfg()
1321 REG16_TSO *reg = (u8Eng == 0)? &(_TSOCtrl->TSO_FILE_CONFIG) : &(_TSOCtrl->TSO_FILE_CONFIG1); in HAL_TSO_File_Cfg1_Enable()
1359 MS_U16 u16data = _HAL_REG16_R(&(_TSOCtrl[u8Eng].TSO_CONFIG2)); in HAL_TSO_RW_ValidBlock_Count()
1365 _HAL_REG16_W(&(_TSOCtrl[u8Eng].TSO_CONFIG2), u16data); in HAL_TSO_RW_ValidBlock_Count()
1367 _REG16_SET(&(_TSOCtrl[u8Eng].TSO_CONFIG1), TSO_CFG1_PKT_PARAM_LD); in HAL_TSO_RW_ValidBlock_Count()
1368 _REG16_CLR(&(_TSOCtrl[u8Eng].TSO_CONFIG1), TSO_CFG1_PKT_PARAM_LD); in HAL_TSO_RW_ValidBlock_Count()
1378 MS_U16 u16data = _HAL_REG16_R(&(_TSOCtrl[u8Eng].TSO_CONFIG2)); in HAL_TSO_RW_InvalidBlock_Count()
1384 _HAL_REG16_W(&(_TSOCtrl[u8Eng].TSO_CONFIG2), u16data); in HAL_TSO_RW_InvalidBlock_Count()
1386 _REG16_SET(&(_TSOCtrl[u8Eng].TSO_CONFIG1), TSO_CFG1_PKT_PARAM_LD); in HAL_TSO_RW_InvalidBlock_Count()
1387 _REG16_CLR(&(_TSOCtrl[u8Eng].TSO_CONFIG1), TSO_CFG1_PKT_PARAM_LD); in HAL_TSO_RW_InvalidBlock_Count()
1459 REG32_TSO *LPCR2 = (u8FileEng == 0)? &(_TSOCtrl->LPCR2_BUF) : &(_TSOCtrl->LPCR2_BUF1); in HAL_TSO_LPcr2_Set()
1460 …REG16_TSO *FILE_CONFIG = (u8FileEng == 0)? &(_TSOCtrl->TSO_FILE_CONFIG) : &(_TSOCtrl->TSO_FILE_CON… in HAL_TSO_LPcr2_Set()
1471 REG32_TSO *LPCR2 = (u8FileEng == 0)? &(_TSOCtrl->LPCR2_BUF) : &(_TSOCtrl->LPCR2_BUF1); in HAL_TSO_LPcr2_Get()
1472 …REG16_TSO *FILE_CONFIG = (u8FileEng == 0)? &(_TSOCtrl->TSO_FILE_CONFIG) : &(_TSOCtrl->TSO_FILE_CON… in HAL_TSO_LPcr2_Get()
1484 REG32_TSO *TIMESTAMP = (u8FileEng == 0)? &(_TSOCtrl->TIMESTAMP) : &(_TSOCtrl->TIMESTAMP1); in HAL_TSO_TimeStamp_Get()
1494 _HAL_REG16_W(&(_TSOCtrl->CHANNEL0_IF1_CONFIG0), in HAL_TSO_PktChkSize_Set()
1495 … (_HAL_REG16_R(&(_TSOCtrl->CHANNEL0_IF1_CONFIG0)) & ~TSO_CHANNEL0_IF1_CONFIG0_PIDFLT_PKT_SIZE_MASK) in HAL_TSO_PktChkSize_Set()
1499 _HAL_REG16_W(&(_TSOCtrl->CHANNEL0_IF2_CONFIG0), in HAL_TSO_PktChkSize_Set()
1500 … (_HAL_REG16_R(&(_TSOCtrl->CHANNEL0_IF2_CONFIG0)) & ~TSO_CHANNEL0_IF2_CONFIG0_PIDFLT_PKT_SIZE_MASK) in HAL_TSO_PktChkSize_Set()
1504 _HAL_REG16_W(&(_TSOCtrl->CHANNEL0_IF3_CONFIG0), in HAL_TSO_PktChkSize_Set()
1505 … (_HAL_REG16_R(&(_TSOCtrl->CHANNEL0_IF3_CONFIG0)) & ~TSO_CHANNEL0_IF3_CONFIG0_PIDFLT_PKT_SIZE_MASK) in HAL_TSO_PktChkSize_Set()
1509 _HAL_REG16_W(&(_TSOCtrl->CHANNEL0_IF4_CONFIG0), in HAL_TSO_PktChkSize_Set()
1510 … (_HAL_REG16_R(&(_TSOCtrl->CHANNEL0_IF4_CONFIG0)) & ~TSO_CHANNEL0_IF4_CONFIG0_PIDFLT_PKT_SIZE_MASK) in HAL_TSO_PktChkSize_Set()
1514 _HAL_REG16_W(&(_TSOCtrl->CHANNEL0_IF5_CONFIG0), in HAL_TSO_PktChkSize_Set()
1515 … (_HAL_REG16_R(&(_TSOCtrl->CHANNEL0_IF5_CONFIG0)) & ~TSO_CHANNEL0_IF5_CONFIG0_PIDFLT_PKT_SIZE_MASK) in HAL_TSO_PktChkSize_Set()
1519 _HAL_REG16_W(&(_TSOCtrl->CHANNEL0_IF6_CONFIG0), in HAL_TSO_PktChkSize_Set()
1520 … (_HAL_REG16_R(&(_TSOCtrl->CHANNEL0_IF6_CONFIG0)) & ~TSO_CHANNEL0_IF6_CONFIG0_PIDFLT_PKT_SIZE_MASK) in HAL_TSO_PktChkSize_Set()
1533 _HAL_REG16_W(&(_TSOCtrl->TSO_CONFIG3), *pu16PktSize); in HAL_TSO_RW_OutputPktSize()
1537 *pu16PktSize = _HAL_REG16_R(&(_TSOCtrl->TSO_CONFIG3)); in HAL_TSO_RW_OutputPktSize()
1540 …_HAL_REG16_W(&(_TSOCtrl->TSO_CONFIG1), SET_FLAG1(_HAL_REG16_R(&_TSOCtrl->TSO_CONFIG1), TSO_CFG1_PK… in HAL_TSO_RW_OutputPktSize()
1541 …_HAL_REG16_W(&(_TSOCtrl->TSO_CONFIG1), RESET_FLAG1(_HAL_REG16_R(&_TSOCtrl->TSO_CONFIG1), TSO_CFG1_… in HAL_TSO_RW_OutputPktSize()
1549 _HAL_REG16_W(&(_TSOCtrl->PKT_CHK_SIZE_FIN), in HAL_TSO_Filein_PktChkSize_Set()
1550 (_HAL_REG16_R(&(_TSOCtrl->PKT_CHK_SIZE_FIN)) & ~TSO_PKT_CHK_SIZE_FIN_MASK) in HAL_TSO_Filein_PktChkSize_Set()
1554 _HAL_REG16_W(&(_TSOCtrl->PKT_CHK_SIZE_FIN), in HAL_TSO_Filein_PktChkSize_Set()
1555 … (_HAL_REG16_R(&(_TSOCtrl->PKT_CHK_SIZE_FIN)) & ~TSO_PKT_CHK_SIZE_FIN1_MASK) in HAL_TSO_Filein_PktChkSize_Set()
1569 _HAL_REG16_W(&(_TSOCtrl->CHANNEL0_IF1_CONFIG0), in HAL_TSO_Livein_PktChkSize_Set()
1570 …(_HAL_REG16_R(&(_TSOCtrl->CHANNEL0_IF1_CONFIG0)) & ~TSO_CHANNEL0_IF1_CONFIG0_PKT_SIZE_CHK_LIVE_MAS… in HAL_TSO_Livein_PktChkSize_Set()
1574 _HAL_REG16_W(&(_TSOCtrl->CHANNEL0_IF2_CONFIG0), in HAL_TSO_Livein_PktChkSize_Set()
1575 …(_HAL_REG16_R(&(_TSOCtrl->CHANNEL0_IF2_CONFIG0)) & ~TSO_CHANNEL0_IF2_CONFIG0_PKT_SIZE_CHK_LIVE_MAS… in HAL_TSO_Livein_PktChkSize_Set()
1579 _HAL_REG16_W(&(_TSOCtrl->CHANNEL0_IF3_CONFIG0), in HAL_TSO_Livein_PktChkSize_Set()
1580 …(_HAL_REG16_R(&(_TSOCtrl->CHANNEL0_IF3_CONFIG0)) & ~TSO_CHANNEL0_IF3_CONFIG0_PKT_SIZE_CHK_LIVE_MAS… in HAL_TSO_Livein_PktChkSize_Set()
1584 _HAL_REG16_W(&(_TSOCtrl->CHANNEL0_IF4_CONFIG0), in HAL_TSO_Livein_PktChkSize_Set()
1585 …(_HAL_REG16_R(&(_TSOCtrl->CHANNEL0_IF4_CONFIG0)) & ~TSO_CHANNEL0_IF4_CONFIG0_PKT_SIZE_CHK_LIVE_MAS… in HAL_TSO_Livein_PktChkSize_Set()
1589 _HAL_REG16_W(&(_TSOCtrl->CHANNEL0_IF5_CONFIG0), in HAL_TSO_Livein_PktChkSize_Set()
1590 …(_HAL_REG16_R(&(_TSOCtrl->CHANNEL0_IF5_CONFIG0)) & ~TSO_CHANNEL0_IF5_CONFIG0_PKT_SIZE_CHK_LIVE_MAS… in HAL_TSO_Livein_PktChkSize_Set()
1594 _HAL_REG16_W(&(_TSOCtrl->CHANNEL0_IF6_CONFIG0), in HAL_TSO_Livein_PktChkSize_Set()
1595 …(_HAL_REG16_R(&(_TSOCtrl->CHANNEL0_IF6_CONFIG0)) & ~TSO_CHANNEL0_IF6_CONFIG0_PKT_SIZE_CHK_LIVE_MAS… in HAL_TSO_Livein_PktChkSize_Set()
1610 _HAL_REG16_W(&(_TSOCtrl->CHANNEL0_IF1_CONFIG1), in HAL_TSO_Livein_Input_Config()
1611 … (_HAL_REG16_R(&(_TSOCtrl->CHANNEL0_IF1_CONFIG1)) & ~TSO_CHANNEL0_IF1_CONFIG1_PKT_INPUT_MODE_MASK) in HAL_TSO_Livein_Input_Config()
1614 _HAL_REG16_W(&(_TSOCtrl->CHANNEL0_IF1_CONFIG1), in HAL_TSO_Livein_Input_Config()
1615 … (_HAL_REG16_R(&(_TSOCtrl->CHANNEL0_IF1_CONFIG1)) & ~TSO_CHANNEL0_IF1_CONFIG1_SYNC_BYTE_MASK) in HAL_TSO_Livein_Input_Config()
1618 _HAL_REG16_W(&(_TSOCtrl->CHANNEL0_IF1_CONFIG1), in HAL_TSO_Livein_Input_Config()
1619 … (_HAL_REG16_R(&(_TSOCtrl->CHANNEL0_IF1_CONFIG1)) & ~TSO_CHANNEL0_IF1_CONFIG1_PKT_HEADER_LEN_MASK) in HAL_TSO_Livein_Input_Config()
1623 _HAL_REG16_W(&(_TSOCtrl->CHANNEL0_IF2_CONFIG1), in HAL_TSO_Livein_Input_Config()
1624 … (_HAL_REG16_R(&(_TSOCtrl->CHANNEL0_IF2_CONFIG1)) & ~TSO_CHANNEL0_IF2_CONFIG1_PKT_INPUT_MODE_MASK) in HAL_TSO_Livein_Input_Config()
1627 _HAL_REG16_W(&(_TSOCtrl->CHANNEL0_IF2_CONFIG1), in HAL_TSO_Livein_Input_Config()
1628 … (_HAL_REG16_R(&(_TSOCtrl->CHANNEL0_IF2_CONFIG1)) & ~TSO_CHANNEL0_IF2_CONFIG1_SYNC_BYTE_MASK) in HAL_TSO_Livein_Input_Config()
1631 _HAL_REG16_W(&(_TSOCtrl->CHANNEL0_IF2_CONFIG1), in HAL_TSO_Livein_Input_Config()
1632 … (_HAL_REG16_R(&(_TSOCtrl->CHANNEL0_IF2_CONFIG1)) & ~TSO_CHANNEL0_IF2_CONFIG1_PKT_HEADER_LEN_MASK) in HAL_TSO_Livein_Input_Config()
1636 _HAL_REG16_W(&(_TSOCtrl->CHANNEL0_IF3_CONFIG1), in HAL_TSO_Livein_Input_Config()
1637 … (_HAL_REG16_R(&(_TSOCtrl->CHANNEL0_IF3_CONFIG1)) & ~TSO_CHANNEL0_IF3_CONFIG1_PKT_INPUT_MODE_MASK) in HAL_TSO_Livein_Input_Config()
1640 _HAL_REG16_W(&(_TSOCtrl->CHANNEL0_IF3_CONFIG1), in HAL_TSO_Livein_Input_Config()
1641 … (_HAL_REG16_R(&(_TSOCtrl->CHANNEL0_IF3_CONFIG1)) & ~TSO_CHANNEL0_IF3_CONFIG1_SYNC_BYTE_MASK) in HAL_TSO_Livein_Input_Config()
1644 _HAL_REG16_W(&(_TSOCtrl->CHANNEL0_IF3_CONFIG1), in HAL_TSO_Livein_Input_Config()
1645 … (_HAL_REG16_R(&(_TSOCtrl->CHANNEL0_IF3_CONFIG1)) & ~TSO_CHANNEL0_IF3_CONFIG1_PKT_HEADER_LEN_MASK) in HAL_TSO_Livein_Input_Config()
1649 _HAL_REG16_W(&(_TSOCtrl->CHANNEL0_IF4_CONFIG1), in HAL_TSO_Livein_Input_Config()
1650 … (_HAL_REG16_R(&(_TSOCtrl->CHANNEL0_IF4_CONFIG1)) & ~TSO_CHANNEL0_IF4_CONFIG1_PKT_INPUT_MODE_MASK) in HAL_TSO_Livein_Input_Config()
1653 _HAL_REG16_W(&(_TSOCtrl->CHANNEL0_IF4_CONFIG1), in HAL_TSO_Livein_Input_Config()
1654 … (_HAL_REG16_R(&(_TSOCtrl->CHANNEL0_IF4_CONFIG1)) & ~TSO_CHANNEL0_IF4_CONFIG1_SYNC_BYTE_MASK) in HAL_TSO_Livein_Input_Config()
1657 _HAL_REG16_W(&(_TSOCtrl->CHANNEL0_IF4_CONFIG1), in HAL_TSO_Livein_Input_Config()
1658 … (_HAL_REG16_R(&(_TSOCtrl->CHANNEL0_IF4_CONFIG1)) & ~TSO_CHANNEL0_IF4_CONFIG1_PKT_HEADER_LEN_MASK) in HAL_TSO_Livein_Input_Config()
1662 _HAL_REG16_W(&(_TSOCtrl->CHANNEL0_IF5_CONFIG1), in HAL_TSO_Livein_Input_Config()
1663 … (_HAL_REG16_R(&(_TSOCtrl->CHANNEL0_IF5_CONFIG1)) & ~TSO_CHANNEL0_IF5_CONFIG1_PKT_INPUT_MODE_MASK) in HAL_TSO_Livein_Input_Config()
1666 _HAL_REG16_W(&(_TSOCtrl->CHANNEL0_IF5_CONFIG1), in HAL_TSO_Livein_Input_Config()
1667 … (_HAL_REG16_R(&(_TSOCtrl->CHANNEL0_IF5_CONFIG1)) & ~TSO_CHANNEL0_IF5_CONFIG1_SYNC_BYTE_MASK) in HAL_TSO_Livein_Input_Config()
1670 _HAL_REG16_W(&(_TSOCtrl->CHANNEL0_IF5_CONFIG1), in HAL_TSO_Livein_Input_Config()
1671 … (_HAL_REG16_R(&(_TSOCtrl->CHANNEL0_IF5_CONFIG1)) & ~TSO_CHANNEL0_IF5_CONFIG1_PKT_HEADER_LEN_MASK) in HAL_TSO_Livein_Input_Config()
1675 _HAL_REG16_W(&(_TSOCtrl->CHANNEL0_IF6_CONFIG1), in HAL_TSO_Livein_Input_Config()
1676 … (_HAL_REG16_R(&(_TSOCtrl->CHANNEL0_IF6_CONFIG1)) & ~TSO_CHANNEL0_IF6_CONFIG1_PKT_INPUT_MODE_MASK) in HAL_TSO_Livein_Input_Config()
1679 _HAL_REG16_W(&(_TSOCtrl->CHANNEL0_IF6_CONFIG1), in HAL_TSO_Livein_Input_Config()
1680 … (_HAL_REG16_R(&(_TSOCtrl->CHANNEL0_IF6_CONFIG1)) & ~TSO_CHANNEL0_IF6_CONFIG1_SYNC_BYTE_MASK) in HAL_TSO_Livein_Input_Config()
1683 _HAL_REG16_W(&(_TSOCtrl->CHANNEL0_IF6_CONFIG1), in HAL_TSO_Livein_Input_Config()
1684 … (_HAL_REG16_R(&(_TSOCtrl->CHANNEL0_IF6_CONFIG1)) & ~TSO_CHANNEL0_IF6_CONFIG1_PKT_HEADER_LEN_MASK) in HAL_TSO_Livein_Input_Config()
1701 _REG16_SET(&(_TSOCtrl->TSO_CONFIG5),TSO_CONFIG5_3_WIRE_EN_1); in HAL_TSO_Livein_3Wire()
1704 _REG16_SET(&(_TSOCtrl->TSO_CONFIG5),TSO_CONFIG5_3_WIRE_EN_2); in HAL_TSO_Livein_3Wire()
1707 _REG16_SET(&(_TSOCtrl->TSO_CONFIG5),TSO_CONFIG5_3_WIRE_EN_3); in HAL_TSO_Livein_3Wire()
1710 _REG16_SET(&(_TSOCtrl->TSO_CONFIG5),TSO_CONFIG5_3_WIRE_EN_4); in HAL_TSO_Livein_3Wire()
1713 _REG16_SET(&(_TSOCtrl->TSO_CONFIG5),TSO_CONFIG5_3_WIRE_EN_5); in HAL_TSO_Livein_3Wire()
1716 _REG16_SET(&(_TSOCtrl->TSO_CONFIG5),TSO_CONFIG5_3_WIRE_EN_6); in HAL_TSO_Livein_3Wire()
1728 _REG16_CLR(&(_TSOCtrl->TSO_CONFIG5),TSO_CONFIG5_3_WIRE_EN_1); in HAL_TSO_Livein_3Wire()
1731 _REG16_CLR(&(_TSOCtrl->TSO_CONFIG5),TSO_CONFIG5_3_WIRE_EN_2); in HAL_TSO_Livein_3Wire()
1734 _REG16_CLR(&(_TSOCtrl->TSO_CONFIG5),TSO_CONFIG5_3_WIRE_EN_3); in HAL_TSO_Livein_3Wire()
1737 _REG16_CLR(&(_TSOCtrl->TSO_CONFIG5),TSO_CONFIG5_3_WIRE_EN_4); in HAL_TSO_Livein_3Wire()
1740 _REG16_CLR(&(_TSOCtrl->TSO_CONFIG5),TSO_CONFIG5_3_WIRE_EN_5); in HAL_TSO_Livein_3Wire()
1743 _REG16_CLR(&(_TSOCtrl->TSO_CONFIG5),TSO_CONFIG5_3_WIRE_EN_6); in HAL_TSO_Livein_3Wire()
1763 _REG16_SET(&(_TSOCtrl->TSO_CONFIG1),TSO_CONFIG1_SERIAL_OUT_EN); in HAL_TSO_SerialMode_En()
1767 _REG16_CLR(&(_TSOCtrl->TSO_CONFIG1),TSO_CONFIG1_SERIAL_OUT_EN); in HAL_TSO_SerialMode_En()
2048 _REG16_SET(&(_TSOCtrl->TSO_CONFIG1), TSO_CONFIG1_TURN_OFF_MCM); in HAL_TSO_PowerCtrl()
2053 _REG16_CLR(&(_TSOCtrl->TSO_CONFIG1), TSO_CONFIG1_TURN_OFF_MCM); in HAL_TSO_PowerCtrl()
2098 _REG16_SET(&(_TSOCtrl->TSO_CONFIG1), TSO_CONFIG1_TURN_OFF_MCM); in HAL_TSO_PowerCtrl()
2103 _REG16_CLR(&(_TSOCtrl->TSO_CONFIG1), TSO_CONFIG1_TURN_OFF_MCM); in HAL_TSO_PowerCtrl()