Lines Matching refs:TSO_CONFIG5

246         _REG16_SET(&(_TSOCtrl->TSO_CONFIG5), TSO_CONFIG5_FIXED_MIU_REG_FLUSH);  in HAL_TSO_Init()
1701                 _REG16_SET(&(_TSOCtrl->TSO_CONFIG5),TSO_CONFIG5_3_WIRE_EN_1);  in HAL_TSO_Livein_3Wire()
1704                 _REG16_SET(&(_TSOCtrl->TSO_CONFIG5),TSO_CONFIG5_3_WIRE_EN_2);  in HAL_TSO_Livein_3Wire()
1707                 _REG16_SET(&(_TSOCtrl->TSO_CONFIG5),TSO_CONFIG5_3_WIRE_EN_3);  in HAL_TSO_Livein_3Wire()
1710                 _REG16_SET(&(_TSOCtrl->TSO_CONFIG5),TSO_CONFIG5_3_WIRE_EN_4);  in HAL_TSO_Livein_3Wire()
1713                 _REG16_SET(&(_TSOCtrl->TSO_CONFIG5),TSO_CONFIG5_3_WIRE_EN_5);  in HAL_TSO_Livein_3Wire()
1716                 _REG16_SET(&(_TSOCtrl->TSO_CONFIG5),TSO_CONFIG5_3_WIRE_EN_6);  in HAL_TSO_Livein_3Wire()
1728                 _REG16_CLR(&(_TSOCtrl->TSO_CONFIG5),TSO_CONFIG5_3_WIRE_EN_1);  in HAL_TSO_Livein_3Wire()
1731                 _REG16_CLR(&(_TSOCtrl->TSO_CONFIG5),TSO_CONFIG5_3_WIRE_EN_2);  in HAL_TSO_Livein_3Wire()
1734                 _REG16_CLR(&(_TSOCtrl->TSO_CONFIG5),TSO_CONFIG5_3_WIRE_EN_3);  in HAL_TSO_Livein_3Wire()
1737                 _REG16_CLR(&(_TSOCtrl->TSO_CONFIG5),TSO_CONFIG5_3_WIRE_EN_4);  in HAL_TSO_Livein_3Wire()
1740                 _REG16_CLR(&(_TSOCtrl->TSO_CONFIG5),TSO_CONFIG5_3_WIRE_EN_5);  in HAL_TSO_Livein_3Wire()
1743                 _REG16_CLR(&(_TSOCtrl->TSO_CONFIG5),TSO_CONFIG5_3_WIRE_EN_6);  in HAL_TSO_Livein_3Wire()