Lines Matching refs:u32Eng
5344 TSP_SRC_SEQ HAL_TSP_Eng2PktDmx_Mapping(MS_U32 u32Eng) in HAL_TSP_Eng2PktDmx_Mapping() argument
5346 switch(u32Eng) in HAL_TSP_Eng2PktDmx_Mapping()
5447 MS_U32 HAL_TSP_PidFltDstMapping(TSP_PIDFLT_DST eDstType, MS_U32 u32Eng) in HAL_TSP_PidFltDstMapping() argument
5451 switch(u32Eng) in HAL_TSP_PidFltDstMapping()
5464 switch(u32Eng) in HAL_TSP_PidFltDstMapping()
5481 switch(u32Eng) in HAL_TSP_PidFltDstMapping()
7046 MS_BOOL HAL_TSP_CAPVR_SPSEnable(MS_U32 u32Eng, MS_U16 u16CaPvrMode, MS_BOOL bEnable) in HAL_TSP_CAPVR_SPSEnable() argument
7050 switch(u32Eng) in HAL_TSP_CAPVR_SPSEnable()
7070 switch(u32Eng) in HAL_TSP_CAPVR_SPSEnable()
7099 void HAL_TSP_PVR_SPSConfig(MS_U32 u32Eng, MS_BOOL CTR_mode) in HAL_TSP_PVR_SPSConfig() argument
7101 switch(u32Eng) in HAL_TSP_PVR_SPSConfig()
7187 printf("SPS CTR mode = %p\n",&(_RegCtrl8[u32Eng].CFG8_05)); in HAL_TSP_PVR_SPSConfig()
7188 REG16_SET(&(_RegCtrl8[u32Eng].CFG8_05),CFG8_05_CTR_MODE_SPS_PVR1); //set CTR mode in HAL_TSP_PVR_SPSConfig()
7189 REG16_W(&(_RegCtrl8[u32Eng].CFG8_00_03[0]), 0x0000); //set counter IV in HAL_TSP_PVR_SPSConfig()
7190 REG16_W(&(_RegCtrl8[u32Eng].CFG8_00_03[1]), 0x0000); in HAL_TSP_PVR_SPSConfig()
7191 REG16_W(&(_RegCtrl8[u32Eng].CFG8_00_03[2]), 0x0000); in HAL_TSP_PVR_SPSConfig()
7192 REG16_W(&(_RegCtrl8[u32Eng].CFG8_00_03[3]), 0x0000); in HAL_TSP_PVR_SPSConfig()
7193 … REG16_W(&(_RegCtrl8[u32Eng].CFG8_04), CFG8_04_CTR_IV_SPS_MAX_1K); //set counter IV max vld in HAL_TSP_PVR_SPSConfig()
7194 REG16_SET(&(_RegCtrl8[u32Eng].CFG8_05),CFG8_05_LOAD_INIT_CNT_SPS1); //load counter IV in HAL_TSP_PVR_SPSConfig()
8336 void HAL_TSP_CLK_GATING(TSP_HAL_GATING ePath, MS_U32 u32Eng, MS_BOOL bEn) in HAL_TSP_CLK_GATING() argument
8348 if(u32Eng > TSP_TSIF_NUM) in HAL_TSP_CLK_GATING()
8350 …ntf("[%s][%s][%d] UnSupported TSIF : %u\n\n",__FILE__,__FUNCTION__,__LINE__, (unsigned int)u32Eng); in HAL_TSP_CLK_GATING()
8353 REG16_SET(&_RegCtrl6->CFG6_79,CFG6_79_REG_CLK_GATING_PATH0 << u32Eng); in HAL_TSP_CLK_GATING()
8367 if(u32Eng > TSP_PVRENG_NUM) in HAL_TSP_CLK_GATING()
8369 …("[%s][%s][%d] UnSupported PVR eng : %u\n\n",__FILE__,__FUNCTION__,__LINE__, (unsigned int)u32Eng); in HAL_TSP_CLK_GATING()
8372 REG16_SET(&_RegCtrl6->CFG6_79,CFG6_79_REG_CLK_GATING_PVR1 << u32Eng); in HAL_TSP_CLK_GATING()
8381 if(u32Eng > TSP_TSIF_NUM) in HAL_TSP_CLK_GATING()
8383 …ntf("[%s][%s][%d] UnSupported TSIF : %u\n\n",__FILE__,__FUNCTION__,__LINE__, (unsigned int)u32Eng); in HAL_TSP_CLK_GATING()
8386 REG16_SET(&_RegCtrl6->CFG6_7F,CFG6_7F_REG_MIU_CLK_GATING_PATH0 << u32Eng); in HAL_TSP_CLK_GATING()
8399 if(u32Eng > TSP_FQ_NUM) in HAL_TSP_CLK_GATING()
8401 …intf("[%s][%s][%d] UnSupported FIQ : %u\n\n",__FILE__,__FUNCTION__,__LINE__, (unsigned int)u32Eng); in HAL_TSP_CLK_GATING()
8404 REG16_SET(&_RegCtrl6->CFG6_6D,CFG6_6D_REG_CLK_GATING_FIQ0 << u32Eng); in HAL_TSP_CLK_GATING()
8413 if(u32Eng > TSP_FQ_NUM) in HAL_TSP_CLK_GATING()
8415 …intf("[%s][%s][%d] UnSupported FIQ : %u\n\n",__FILE__,__FUNCTION__,__LINE__, (unsigned int)u32Eng); in HAL_TSP_CLK_GATING()
8418 REG16_SET(&_RegCtrl6->CFG6_6D,CFG6_6D_REG_MIU_CLK_GATING_FIQ0 << u32Eng); in HAL_TSP_CLK_GATING()
8435 if(u32Eng > TSP_TSIF_NUM) in HAL_TSP_CLK_GATING()
8437 …ntf("[%s][%s][%d] UnSupported TSIF : %u\n\n",__FILE__,__FUNCTION__,__LINE__, (unsigned int)u32Eng); in HAL_TSP_CLK_GATING()
8440 REG16_CLR(&_RegCtrl6->CFG6_79,CFG6_79_REG_CLK_GATING_PATH0 << u32Eng); in HAL_TSP_CLK_GATING()
8454 if(u32Eng > TSP_PVRENG_NUM) in HAL_TSP_CLK_GATING()
8456 …("[%s][%s][%d] UnSupported PVR eng : %u\n\n",__FILE__,__FUNCTION__,__LINE__, (unsigned int)u32Eng); in HAL_TSP_CLK_GATING()
8459 REG16_CLR(&_RegCtrl6->CFG6_79,CFG6_79_REG_CLK_GATING_PVR1 << u32Eng); in HAL_TSP_CLK_GATING()
8468 if(u32Eng > TSP_TSIF_NUM) in HAL_TSP_CLK_GATING()
8470 …ntf("[%s][%s][%d] UnSupported TSIF : %u\n\n",__FILE__,__FUNCTION__,__LINE__, (unsigned int)u32Eng); in HAL_TSP_CLK_GATING()
8474 REG16_CLR(&_RegCtrl6->CFG6_7F,CFG6_7F_REG_MIU_CLK_GATING_PATH0 << u32Eng); in HAL_TSP_CLK_GATING()
8487 if(u32Eng > TSP_FQ_NUM) in HAL_TSP_CLK_GATING()
8489 …intf("[%s][%s][%d] UnSupported FIQ : %u\n\n",__FILE__,__FUNCTION__,__LINE__, (unsigned int)u32Eng); in HAL_TSP_CLK_GATING()
8492 REG16_CLR(&_RegCtrl6->CFG6_6D,CFG6_6D_REG_CLK_GATING_FIQ0 << u32Eng); in HAL_TSP_CLK_GATING()
8501 if(u32Eng > TSP_FQ_NUM) in HAL_TSP_CLK_GATING()
8503 …intf("[%s][%s][%d] UnSupported FIQ : %u\n\n",__FILE__,__FUNCTION__,__LINE__, (unsigned int)u32Eng); in HAL_TSP_CLK_GATING()
8506 REG16_CLR(&_RegCtrl6->CFG6_6D,CFG6_6D_REG_MIU_CLK_GATING_FIQ1 << u32Eng); in HAL_TSP_CLK_GATING()