Lines Matching refs:TSP_Ctrl1

269     REG16_CLR(&_RegCtrl->TSP_Ctrl1, TSP_CTRL1_STANDBY);  in HAL_TSP_HwPatch()
370         REG16_CLR(&_RegCtrl->TSP_Ctrl1, TSP_CTRL1_PVR_CMD_QUEUE_ENABLE);  in HAL_TSP_Reset()
375         REG16_SET(&_RegCtrl->TSP_Ctrl1, TSP_CTRL1_CMDQ_RESET);  in HAL_TSP_Reset()
388         REG16_CLR(&_RegCtrl->TSP_Ctrl1, TSP_CTRL1_CMDQ_RESET);  in HAL_TSP_Reset()
1564 …REG16_SET(&_RegCtrl->TSP_Ctrl1, TSP_CTRL1_PVR_CMD_QUEUE_ENABLE);    // for wishbone DMA (load firm…  in HAL_TSP_TSIF_FileEn()
1595                 REG16_CLR(&_RegCtrl->TSP_Ctrl1, TSP_CTRL1_PVR_CMD_QUEUE_ENABLE);  in HAL_TSP_TSIF_FileEn()
2422             REG16_SET(&_RegCtrl->TSP_Ctrl1, TSP_CTRL1_FILEIN_PAUSE);  in HAL_TSP_File_Pause()
2443             REG16_CLR(&_RegCtrl->TSP_Ctrl1, TSP_CTRL1_FILEIN_PAUSE);  in HAL_TSP_File_Resume()
2531                 REG16_SET(&_RegCtrl->TSP_Ctrl1, TSP_CTRL1_CMDQ_RESET);  in HAL_TSP_Filein_CmdQRst()
2551                 REG16_CLR(&_RegCtrl->TSP_Ctrl1, TSP_CTRL1_CMDQ_RESET);  in HAL_TSP_Filein_CmdQRst()
2707             if (REG16_R(&_RegCtrl->TSP_Ctrl1) & TSP_CTRL1_FILEIN_PAUSE )  in HAL_TSP_Filein_GetState()