Lines Matching refs:REG16_TSO
187 } REG16_TSO; typedef
196 REG16_TSO SW_RSTZ; //00
211 REG16_TSO SW_RSTZ1; //01
219 REG16_TSO CFG_TSO_02_03[2];
221 REG16_TSO CHANNEL0_IF1_CONFIG0; //04
227 REG16_TSO CHANNEL0_IF1_CONFIG1; //05
235 REG16_TSO CHANNEL0_IF1_CONFIG2; //06
253 REG16_TSO CHANNEL0_IF1_CONFIG3; //07 reserved
255 REG16_TSO CHANNEL0_IF2_CONFIG0; //08
261 REG16_TSO CHANNEL0_IF2_CONFIG1; //09
269 REG16_TSO CHANNEL0_IF2_CONFIG2; //0a
285 REG16_TSO CHANNEL0_IF2_CONFIG3; //0b reserved
287 REG16_TSO CHANNEL0_IF3_CONFIG0; //0c
293 REG16_TSO CHANNEL0_IF3_CONFIG1; //0d
301 REG16_TSO CHANNEL0_IF3_CONFIG2; //0e
317 REG16_TSO CHANNEL0_IF3_CONFIG3; //0f reserved
319 REG16_TSO CHANNEL0_IF4_CONFIG0; //10
325 REG16_TSO CHANNEL0_IF4_CONFIG1; //11
333 REG16_TSO CHANNEL0_IF4_CONFIG2; //12
349 REG16_TSO CHANNEL0_IF4_CONFIG3; //13 reserved
351 REG16_TSO CHANNEL0_IF5_CONFIG0; //14
357 REG16_TSO CHANNEL0_IF5_CONFIG1; //15
365 REG16_TSO CHANNEL0_IF5_CONFIG2; //16
381 REG16_TSO CHANNEL0_IF5_CONFIG3; //17 reserved
383 REG16_TSO CHANNEL0_IF6_CONFIG0; //18
389 REG16_TSO CHANNEL0_IF6_CONFIG1; //19
397 REG16_TSO CHANNEL0_IF6_CONFIG2; //1a
413 REG16_TSO CHANNEL0_IF6_CONFIG3; //1b reserved
415 REG16_TSO TSO_CONFIG0; //1c
427 REG16_TSO TSO_CONFIG1; //1d
448 REG16_TSO TSO_CONFIG2; //1e
454 REG16_TSO TSO_CONFIG3; //1f
467 REG16_TSO CLR_BYTE_CNT; //40
475 REG16_TSO CFG_TSO_41_42[2]; //41~42
477 REG16_TSO TSO_CONFIG4; //43
486 REG16_TSO TSO_CONFIG5; //44
498 … REG16_TSO PDTABLE_ADDR_L; //45 ind R/W of L addr to pdtable
499 … REG16_TSO PDTABLE_ADDR_H; //46 ind R/W of H addr to pdtable
501 … REG16_TSO PDTABLE_WDATA_L; //47 ind R/W of L addr to pdtable
502 … REG16_TSO PDTABLE_WDATA_H; //48 ind R/W of L addr to pdtable
504 REG16_TSO PDTABLE_RDATA; //49 ind of Rdata from pdtable
506 REG16_TSO PDTABLE_EN; //4a
510 REG16_TSO TSO_STATUS; //4b
515 REG16_TSO FILE_TIMER[2]; //4c ~ 4d
517 REG16_TSO TSO_STATUS1; //4e
525 REG16_TSO CFG_TSO_4F_5A[12]; //4f~5a
527 REG16_TSO TSO_TRACING_HIGH; //5b
528 REG16_TSO TSO_TRACING_LOW; //5c
529 REG16_TSO TSO_TRACING_1T; //5d
530 REG16_TSO TSO_BLOCK_SIZE_DB; //5e
531 REG16_TSO TSO_OPT_SZIE_DB; //5f
534 REG16_TSO TSO_Filein_Ctrl; //64
536 REG16_TSO TSO_Filein_Ctrl1; //69
542 REG16_TSO PKT_CNT_SEL; //6a
550 REG16_TSO PKT_CHK_SIZE_FIN; //6b
565 REG16_TSO CMD_QUEUE_STATUS; //78
580 REG16_TSO TSO_FILE_CONFIG; //79
596 REG16_TSO TSO_FILE_CONFIG1; //7a
612 REG16_TSO INTERRUPT; //7b
624 REG16_TSO INTERRUPT1; //7c
641 REG16_TSO DBG_SEL; //7f
653 REG16_TSO REG_PRE_HEADER_1_CONFIG_0; //00
657 REG16_TSO REG_PRE_HEADER_1_CONFIG_1; //01
658 REG16_TSO REG_PRE_HEADER_1_CONFIG_2; //02
659 REG16_TSO REG_PRE_HEADER_1_CONFIG_3; //03
661 REG16_TSO REG_PRE_HEADER_2_CONFIG_0; //04
665 REG16_TSO REG_PRE_HEADER_2_CONFIG_1; //05
666 REG16_TSO REG_PRE_HEADER_2_CONFIG_2; //06
667 REG16_TSO REG_PRE_HEADER_2_CONFIG_3; //07
669 REG16_TSO REG_PRE_HEADER_3_CONFIG_0; //08
673 REG16_TSO REG_PRE_HEADER_3_CONFIG_1; //09
674 REG16_TSO REG_PRE_HEADER_3_CONFIG_2; //0a
675 REG16_TSO REG_PRE_HEADER_3_CONFIG_3; //0b
677 REG16_TSO REG_PRE_HEADER_4_CONFIG_0; //0c
681 REG16_TSO REG_PRE_HEADER_4_CONFIG_1; //0d
682 REG16_TSO REG_PRE_HEADER_4_CONFIG_2; //0e
683 REG16_TSO REG_PRE_HEADER_4_CONFIG_3; //0f
685 REG16_TSO REG_PRE_HEADER_5_CONFIG_0; //10
689 REG16_TSO REG_PRE_HEADER_5_CONFIG_1; //11
690 REG16_TSO REG_PRE_HEADER_5_CONFIG_2; //12
691 REG16_TSO REG_PRE_HEADER_5_CONFIG_3; //13
693 REG16_TSO REG_PRE_HEADER_6_CONFIG_0; //14
697 REG16_TSO REG_PRE_HEADER_6_CONFIG_1; //15
698 REG16_TSO REG_PRE_HEADER_6_CONFIG_2; //16
699 REG16_TSO REG_PRE_HEADER_6_CONFIG_3; //17
705 REG16_TSO SVQ1_SIZE_200BYTE; //1a
709 REG16_TSO SVQ1_TX_CONFIG; //1b
721 REG16_TSO SVQ2_SIZE_200BYTE; //1E
722 REG16_TSO SVQ2_TX_CONFIG; //1F
724 REG16_TSO SVQ3_SIZE_200BYTE; //22
725 REG16_TSO SVQ3_TX_CONFIG; //23
727 REG16_TSO SVQ4_SIZE_200BYTE; //26
728 REG16_TSO SVQ4_TX_CONFIG; //27
730 REG16_TSO SVQ5_SIZE_200BYTE; //2a
731 REG16_TSO SVQ5_TX_CONFIG; //2b
733 REG16_TSO SVQ6_SIZE_200BYTE; //2E
734 REG16_TSO SVQ6_TX_CONFIG; //2F
736 REG16_TSO SVQ_RX_CONFIG; //30
760 REG16_TSO SVQ_RX_1_2_PRIORITY; //31
766 REG16_TSO SVQ_RX_3_4_PRIORITY; //32
772 REG16_TSO SVQ_RX_5_6_PRIORITY; //33
839 REG16_TSO DELTA_CONFIG; //3a
852 REG16_TSO REG_TSO1_CFG3B_52[24]; //3b~52
853 REG16_TSO REG_TSO_MIU_SEL_1; //53
870 REG16_TSO REG_TSO_MIU_SEL_2; //54
873 REG16_TSO REG_TSO1_CFG55_66[18]; //55~66
874 REG16_TSO REG_TSO_MIU_ABT_CONFIG_1;