Lines Matching refs:MIU_BUS

119 #define MIU_BUS (4)  macro
551 u32DnldCtrl = (u32FwPhyAddr >> MIU_BUS) >> TSP_DNLD_ADDR_ALI_SHIFT; in HAL_TSP_LoadFW()
3379 u32OneBufSize = ((u32BufLen >> MIU_BUS) / VQ_NUM) << MIU_BUS; //miu alignment in HAL_TSP_SetVQ()
3407 REG32_W(&_RegCtrl->VQ0_BASE, (u32BaseAddr >> MIU_BUS)); in HAL_TSP_VQ_Buffer()
3411 REG32_W(&_RegCtrl->VQ1_Base, (u32BaseAddr >> MIU_BUS)); in HAL_TSP_VQ_Buffer()
3415 REG32_W(&_RegCtrl->VQ2_Base, (u32BaseAddr >> MIU_BUS)); in HAL_TSP_VQ_Buffer()
3770 REG32_W(&_RegCtrl->TsRec_Head, (u32StartAddr0>> MIU_BUS) & TSP_STR2MI2_ADDR_MASK); in HAL_PVR_SetBuf()
3772 REG32_W(&(_RegCtrl->TsRec_Tail), (u32EndAddr0 >> MIU_BUS) & TSP_STR2MI2_ADDR_MASK); in HAL_PVR_SetBuf()
3774 … REG32_W(&(_RegCtrl->TsRec_Mid_PVR1_WPTR), (u32StartAddr0>>MIU_BUS) & TSP_STR2MI2_ADDR_MASK); in HAL_PVR_SetBuf()
3777 … REG32_W(&_RegCtrl->Str2mi_head2pvr1, (u32StartAddr1>> MIU_BUS) & TSP_HW_PVR1_BUF_HEAD2_MASK); in HAL_PVR_SetBuf()
3779 … REG32_W(&(_RegCtrl->Str2mi_tail2pvr1), (u32EndAddr1 >> MIU_BUS) &TSP_HW_PVR1_BUF_TAIL2_MASK); in HAL_PVR_SetBuf()
3781 … REG32_W(&(_RegCtrl->Str2mi_mid2pvr1), (u32StartAddr1>>MIU_BUS) & TSP_HW_PVR1_BUF_MID2_MASK); in HAL_PVR_SetBuf()
3785 … REG32_W(&_RegCtrl->Str2mi_head1_pvr2, (u32StartAddr0>> MIU_BUS) & TSP_STR2MI2_ADDR_MASK); in HAL_PVR_SetBuf()
3787 REG32_W(&_RegCtrl->Str2mi_tail1_pvr2, (u32EndAddr0>> MIU_BUS) & TSP_STR2MI2_ADDR_MASK); in HAL_PVR_SetBuf()
3789 … REG32_W(&(_RegCtrl->Str2mi_mid1_wptr_pvr2), (u32StartAddr0>>MIU_BUS) & TSP_STR2MI2_ADDR_MASK); in HAL_PVR_SetBuf()
3792 … REG32_W(&_RegCtrl->Str2mi_head2_pvr2, (u32StartAddr1>> MIU_BUS) & TSP_STR2MI2_ADDR_MASK); in HAL_PVR_SetBuf()
3794 REG32_W(&_RegCtrl->Str2mi_tail2_pvr2, (u32EndAddr1>> MIU_BUS) & TSP_STR2MI2_ADDR_MASK); in HAL_PVR_SetBuf()
3796 … REG32_W(&(_RegCtrl->Str2mi_mid2_pvr2), (u32StartAddr1>>MIU_BUS) & TSP_STR2MI2_ADDR_MASK); in HAL_PVR_SetBuf()
3810 REG32_W(&_RegCtrl->TsRec_Head, (u32StartAddr0>> MIU_BUS) & TSP_STR2MI2_ADDR_MASK); in HAL_PVR_SetStr2Miu_StartAddr()
3813 … REG32_W(&_RegCtrl->Str2mi_head2pvr1, (u32StartAddr1>> MIU_BUS) & TSP_HW_PVR1_BUF_HEAD2_MASK); in HAL_PVR_SetStr2Miu_StartAddr()
3817 … REG32_W(&_RegCtrl->Str2mi_head1_pvr2, (u32StartAddr0>> MIU_BUS) & TSP_STR2MI2_ADDR_MASK); in HAL_PVR_SetStr2Miu_StartAddr()
3820 … REG32_W(&_RegCtrl->Str2mi_head2_pvr2, (u32StartAddr1>> MIU_BUS) & TSP_STR2MI2_ADDR_MASK); in HAL_PVR_SetStr2Miu_StartAddr()
3857 REG32_W(&(_RegCtrl->TsRec_Tail), (u32EndAddr0 >> MIU_BUS) & TSP_STR2MI2_ADDR_MASK); in HAL_PVR_SetStr2Miu_EndAddr()
3860 … REG32_W(&(_RegCtrl->Str2mi_tail2pvr1), (u32EndAddr1 >> MIU_BUS) &TSP_HW_PVR1_BUF_TAIL2_MASK); in HAL_PVR_SetStr2Miu_EndAddr()
3864 REG32_W(&_RegCtrl->Str2mi_tail1_pvr2, (u32EndAddr0>> MIU_BUS) & TSP_STR2MI2_ADDR_MASK); in HAL_PVR_SetStr2Miu_EndAddr()
3867 REG32_W(&_RegCtrl->Str2mi_tail2_pvr2, (u32EndAddr1>> MIU_BUS) & TSP_STR2MI2_ADDR_MASK); in HAL_PVR_SetStr2Miu_EndAddr()
3879 return (REG32_R(&_RegCtrl->TsRec_Mid_PVR1_WPTR) << MIU_BUS); in HAL_PVR_GetWritePtr()
3882 return (REG32_R(&_RegCtrl->Str2mi_mid1_wptr_pvr2) << MIU_BUS); in HAL_PVR_GetWritePtr()
5183 …REG32_W(&_RegCtrl->ORZ_DMAW_LBND,(MS_U32)(((u32AddrL - phyMiuOffset) >> MIU_BUS) & TSP_ORZ_DMAW_LB… in HAL_TSP_OR_Address_Protect()
5184 …REG32_W(&_RegCtrl->ORZ_DMAW_UBND,(MS_U32)(((u32AddrH - phyMiuOffset) >> MIU_BUS) & TSP_ORZ_DMAW_UB… in HAL_TSP_OR_Address_Protect()
5203 MS_U32 u32LBnd = (MS_U32)(((u32AddrL - phyMiuOffset) >> MIU_BUS) & TSP_DMAW_BND_MASK); in HAL_TSP_SEC_Address_Protect()
5204 MS_U32 u32UBnd = (MS_U32)(((u32AddrH - phyMiuOffset) >> MIU_BUS) & TSP_DMAW_BND_MASK); in HAL_TSP_SEC_Address_Protect()
5256 MS_U32 u32LBnd = (MS_U32)(((u32AddrL - phyMiuOffset) >> MIU_BUS) & TSP_PVR_MASK); in HAL_TSP_PVR_Address_Protect()
5257 MS_U32 u32UBnd = (MS_U32)(((u32AddrH - phyMiuOffset) >> MIU_BUS) & TSP_PVR_MASK); in HAL_TSP_PVR_Address_Protect()
5315 MS_U32 u32LBnd = (MS_U32)(((u32AddrL - phyMiuOffset) >> MIU_BUS) & TSP_FILEIN_DMAR_BND_MASK); in HAL_TSP_FILEIN_Address_Protect()
5316 MS_U32 u32UBnd = (MS_U32)(((u32AddrH - phyMiuOffset) >> MIU_BUS) & TSP_FILEIN_DMAR_BND_MASK); in HAL_TSP_FILEIN_Address_Protect()
5372 MS_U32 u32LBnd = (MS_U32)(((u32AddrL - phyMiuOffset) >> MIU_BUS) & TSP_MMFI_DMAR_BND_MASK); in HAL_TSP_MMFI_Address_Protect()
5373 MS_U32 u32UBnd = (MS_U32)(((u32AddrH - phyMiuOffset) >> MIU_BUS) & TSP_MMFI_DMAR_BND_MASK); in HAL_TSP_MMFI_Address_Protect()