101 REG_FIQ*               _REGFIQ    = NULL;  variable
147     _REGFIQ = (REG_FIQ*)(_u32RegBase + FQ_REG_CTRL_BASE);  in HAL_FQ_SetBank()
176     FQ32_W(&(_REGFIQ[u32FQEng].str2mi_head), MIU_FQ(u32StartAddr) & FIQ_STR2MI2_ADDR_MASK);  in HAL_FQ_PVR_SetBuf()
177     FQ32_W(&(_REGFIQ[u32FQEng].str2mi_tail), MIU_FQ(u32EndAddr) & FIQ_STR2MI2_ADDR_MASK);  in HAL_FQ_PVR_SetBuf()
178     FQ32_W(&(_REGFIQ[u32FQEng].str2mi_mid), MIU_FQ(u32StartAddr) & FIQ_STR2MI2_ADDR_MASK);  in HAL_FQ_PVR_SetBuf()
183     FQ32_W(&(_REGFIQ[u32FQEng].rush_addr), MIU_FQ(u32RushAddr) & FIQ_STR2MI2_ADDR_MASK);  in HAL_FQ_PVR_SetRushAddr()
189 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config…  in HAL_FQ_PVR_Start()
190 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config…  in HAL_FQ_PVR_Start()
193 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config…  in HAL_FQ_PVR_Start()
198 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config…  in HAL_FQ_PVR_Stop()
203 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config…  in HAL_FQ_Rush_Enable()
204 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config…  in HAL_FQ_Rush_Enable()
211 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config11), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi…  in HAL_FQ_Bypass()
215 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config11), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi…  in HAL_FQ_Bypass()
223 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config…  in HAL_FQ_SWReset()
227 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config…  in HAL_FQ_SWReset()
235 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config…  in HAL_FQ_AddrMode()
239 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config…  in HAL_FQ_AddrMode()
245 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config…  in HAL_FQ_GetRead()
246 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config…  in HAL_FQ_GetRead()
248     return (_HAL_REG32_R(&(_REGFIQ[u32FQEng].Fiq2mi2_radr_r)) << MIU_BUS);  in HAL_FQ_GetRead()
253 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config…  in HAL_FQ_GetWrite()
254 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config…  in HAL_FQ_GetWrite()
256     return (_HAL_REG32_R(&(_REGFIQ[u32FQEng].str2mi2_wadr_r)) << MIU_BUS);  in HAL_FQ_GetWrite()
268 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config11), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi…  in HAL_FQ_SkipRushData()
269 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config11), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi…  in HAL_FQ_SkipRushData()
274 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config16),  _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_conf…  in HAL_FQ_INT_Enable()
279 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config16), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi…  in HAL_FQ_INT_Disable()
284     return _HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config16)) & FIQ_CFG16_INT_STATUS_MASK;  in HAL_FQ_INT_GetHW()
289 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config16), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi…  in HAL_FQ_INT_ClrHW()
296 …FQ16_W(&(_REGFIQ[u32FQEng].REG_FIQ0_CFG2), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].REG_FIQ0_CFG2)),…  in HAL_FQ_Timestamp_Sel()
300 …FQ16_W(&(_REGFIQ[u32FQEng].REG_FIQ0_CFG2), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].REG_FIQ0_CFG2)),…  in HAL_FQ_Timestamp_Sel()
308 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config11), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi…  in HAL_FQ_GetPVRTimeStamp()
309     u32Timestamp = _HAL_REG32_R(&(_REGFIQ[u32FQEng].lpcr1));  in HAL_FQ_GetPVRTimeStamp()
310 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config11), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi…  in HAL_FQ_GetPVRTimeStamp()
317 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config11), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi…  in HAL_FQ_SetPVRTimeStamp()
318     FQ32_W(&(_REGFIQ[u32FQEng].lpcr1), u32Stamp);  in HAL_FQ_SetPVRTimeStamp()
319 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config11), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi…  in HAL_FQ_SetPVRTimeStamp()