Lines Matching refs:FQ16_W

107 #define FQ16_W(reg, value);    {(reg)->data = ((value) & 0x0000FFFF);}  macro
189FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Start()
190FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Start()
193FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Start()
198FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Stop()
203FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_Rush_Enable()
204FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_Rush_Enable()
211FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config11), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_Bypass()
215FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config11), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_Bypass()
223FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_SWReset()
227FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_SWReset()
235FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_AddrMode()
239FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_AddrMode()
245FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_GetRead()
246FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_GetRead()
253FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_GetWrite()
254FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_GetWrite()
268FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config11), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_SkipRushData()
269FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config11), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_SkipRushData()
274FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config16), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_conf… in HAL_FQ_INT_Enable()
279FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config16), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_INT_Disable()
289FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config16), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_INT_ClrHW()
296FQ16_W(&(_REGFIQ[u32FQEng].REG_FIQ0_CFG2), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].REG_FIQ0_CFG2)),… in HAL_FQ_Timestamp_Sel()
300FQ16_W(&(_REGFIQ[u32FQEng].REG_FIQ0_CFG2), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].REG_FIQ0_CFG2)),… in HAL_FQ_Timestamp_Sel()
308FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config11), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_GetPVRTimeStamp()
310FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config11), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_GetPVRTimeStamp()
317FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config11), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_SetPVRTimeStamp()
319FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config11), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_SetPVRTimeStamp()