Lines Matching refs:TSP_CLKGEN0_REG
216 #define TSP_CLKGEN0_REG(addr) (*((volatile MS_U16*)(_virtRegBase + 0x1600UL + ((addr)<<2UL)))) macro
2269 …u32data = TSP_CLKGEN0_REG(REG_CLKGEN0_TSN_CLK) & ~(REG_CLKGEN0_TSN_CLK_MASK<< REG_CLKGEN0_TSN_CLK_… in HAL_TSP_SelPad_ClkInv()
2271 TSP_CLKGEN0_REG(REG_CLKGEN0_TSN_CLK) = u32data; in HAL_TSP_SelPad_ClkInv()
2274 …u32data = TSP_CLKGEN0_REG(REG_CLKGEN0_TSN_CLK) & ~(REG_CLKGEN0_TSN_CLK_MASK<< REG_CLKGEN0_TSN_CLK_… in HAL_TSP_SelPad_ClkInv()
2276 TSP_CLKGEN0_REG(REG_CLKGEN0_TSN_CLK) = u32data; in HAL_TSP_SelPad_ClkInv()
2279 …u32data = TSP_CLKGEN0_REG(REG_CLKGEN0_TSN_CLK2) & ~(REG_CLKGEN0_TSN_CLK_MASK<< REG_CLKGEN0_TSN_CLK… in HAL_TSP_SelPad_ClkInv()
2281 TSP_CLKGEN0_REG(REG_CLKGEN0_TSN_CLK2) = u32data; in HAL_TSP_SelPad_ClkInv()
3425 …*pu16Clk = (TSP_CLKGEN0_REG(REG_CLKGEN0_TSN_CLK) >> REG_CLKGEN0_TSN_CLK_TS0_SHIFT) & REG_CLKGEN0… in HAL_TSP_GetTSIF_Status()
3432 …*pu16Clk = (TSP_CLKGEN0_REG(REG_CLKGEN0_TSN_CLK) >> REG_CLKGEN0_TSN_CLK_TS1_SHIFT) & REG_CLKGEN0… in HAL_TSP_GetTSIF_Status()
3439 …*pu16Clk = (TSP_CLKGEN0_REG(REG_CLKGEN0_TSN_CLK2) >> REG_CLKGEN0_TSN_CLK_TS2_SHIFT) & REG_CLKGEN… in HAL_TSP_GetTSIF_Status()
3608 … return (TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_STC_CW_L) | TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_STC_CW_H)); in HAL_TSP_GetSTCSynth()
3610 … return (TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_STC1_CW_L) | TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_STC1_CW_H)); in HAL_TSP_GetSTCSynth()
3627 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) &= ~REG_CLKGEN0_STC_CW_SEL; in HAL_TSP_SetSTCSynth()
3631 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_STC_CW_L) = (MS_U16)(u32Sync & 0xFFFF); in HAL_TSP_SetSTCSynth()
3632 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_STC_CW_H) = (MS_U16)((u32Sync >> 16UL) & 0xFFFF); in HAL_TSP_SetSTCSynth()
3635 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) &= ~REG_CLKGEN0_STC_CW_EN; in HAL_TSP_SetSTCSynth()
3636 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) |= REG_CLKGEN0_STC_CW_EN; in HAL_TSP_SetSTCSynth()
3637 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) &= ~REG_CLKGEN0_STC_CW_EN; in HAL_TSP_SetSTCSynth()
3641 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) |= REG_CLKGEN0_STC_CW_SEL; in HAL_TSP_SetSTCSynth()
3644 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) &= ~REG_CLKGEN0_STC1_CW_SEL; in HAL_TSP_SetSTCSynth()
3645 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_STC1_CW_L) = (MS_U16)(u32Sync & 0xFFFF); in HAL_TSP_SetSTCSynth()
3646 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_STC1_CW_H) = (MS_U16)((u32Sync >> 16UL) & 0xFFFF); in HAL_TSP_SetSTCSynth()
3647 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) &= ~REG_CLKGEN0_STC1_CW_EN; in HAL_TSP_SetSTCSynth()
3648 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) |= REG_CLKGEN0_STC1_CW_EN; in HAL_TSP_SetSTCSynth()
3649 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) &= ~REG_CLKGEN0_STC1_CW_EN; in HAL_TSP_SetSTCSynth()
3650 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) |= REG_CLKGEN0_STC1_CW_SEL; in HAL_TSP_SetSTCSynth()
6248 _u16ClkgenRegArray[u32ii] = TSP_CLKGEN0_REG(u32ii); in HAL_TSP_SaveRegs()
6250 _u16ClkgenRegArray[0x7c] = TSP_CLKGEN0_REG(0x7c); in HAL_TSP_SaveRegs()
6251 _u16ClkgenRegArray[0x7d] = TSP_CLKGEN0_REG(0x7d); in HAL_TSP_SaveRegs()
6252 _u16ClkgenRegArray[0x7e] = TSP_CLKGEN0_REG(0x7e); in HAL_TSP_SaveRegs()
6300 TSP_CLKGEN0_REG(u32ii) = _u16ClkgenRegArray[u32ii]; in HAL_TSP_RestoreRegs()
6302 TSP_CLKGEN0_REG(0x7c) = _u16ClkgenRegArray[0x7c]; in HAL_TSP_RestoreRegs()
6303 TSP_CLKGEN0_REG(0x7d) = _u16ClkgenRegArray[0x7d]; in HAL_TSP_RestoreRegs()
6304 TSP_CLKGEN0_REG(0x7e) = _u16ClkgenRegArray[0x7e]; in HAL_TSP_RestoreRegs()