Lines Matching refs:HAL_TSO_Cfg1_Enable

317         HAL_TSO_Cfg1_Enable(u8jj, TSO_CFG1_PKT_NULL_EN, FALSE);  in MDrv_TSO_Exit()
435 …   HAL_TSO_Cfg1_Enable(u8Eng, TSO_CFG1_ALT_TS_SIZE|TSO_CFG1_PID_BYPASS|TSO_CFG1_PKT_NULL_EN, TRUE);  in MDrv_TSO_SetOperateMode()
445 … HAL_TSO_Cfg1_Enable(u8Eng, TSO_CFG1_FORCE_SYNC_EN|TSO_CFG1_PID_BYPASS|TSO_CFG1_ALT_TS_SIZE, TRUE);  in MDrv_TSO_SetOperateMode()
467 …   HAL_TSO_Cfg1_Enable(u8Eng, TSO_CFG1_ALT_TS_SIZE|TSO_CFG1_PID_BYPASS|TSO_CFG1_PKT_NULL_EN, TRUE);  in MDrv_TSO_SetOperateMode()
471 … HAL_TSO_Cfg1_Enable(u8Eng, TSO_CFG1_FORCE_SYNC_EN|TSO_CFG1_PID_BYPASS|TSO_CFG1_ALT_TS_SIZE, TRUE);  in MDrv_TSO_SetOperateMode()
899     HAL_TSO_Cfg1_Enable(u8Eng, TSO_CFG1_PKT192_ENABLE, bEnable);  in MDrv_TSO_Filein_192Mode_En()
915     HAL_TSO_Cfg1_Enable(u8Eng, TSO_CFG1_PKT192_BLOCK_DISABLE, (!bEnable));  in MDrv_TSO_Filein_192BlockScheme_En()
931     HAL_TSO_Cfg1_Enable(u8Eng, TSO_CFG1_TEI_SKIP_PKT, bEnable);  in MDrv_TSO_TEI_SkipPkt()
946     HAL_TSO_Cfg1_Enable(u8Eng, TSO_CFG1_CLEAR_PIDFLT_BYTE_CNT, TRUE);  in MDrv_TSO_Clr_Pidflt_ByteCnt()
947     HAL_TSO_Cfg1_Enable(u8Eng, TSO_CFG1_CLEAR_PIDFLT_BYTE_CNT, FALSE);  in MDrv_TSO_Clr_Pidflt_ByteCnt()
1060     HAL_TSO_Cfg1_Enable(u8Eng, TSO_CFG1_PKT_WAVEFORM_PARAM_LD, TRUE);  in MDrv_TSO_Filein_Start()
1061     HAL_TSO_Cfg1_Enable(u8Eng, TSO_CFG1_PKT_WAVEFORM_PARAM_LD, FALSE);  in MDrv_TSO_Filein_Start()