319     pic_vir_src_ystride = (src_params->src_width + 3) / 4;  in set_hist_to_vdpp2_reg()
394     if (src_params->src_width < 1080)  in set_hist_to_vdpp2_reg()
395         sw_dci_blk_hsize = src_params->src_width / (16 * hsd_sample_num);  in set_hist_to_vdpp2_reg()
397 …    sw_dci_blk_hsize = (src_params->src_width + (16 * hsd_sample_num - 1)) / (16 * hsd_sample_num);  in set_hist_to_vdpp2_reg()
405 …dst_reg->dci.reg2.sw_vdpp_src_pic_width = MPP_ALIGN_DOWN(src_params->src_width, hsd_sample_num) - …  in set_hist_to_vdpp2_reg()
1127 …RK_U32 src_right_redundant = src_params->src_width % 16 == 0 ? 0 : 16 - src_params->src_width % 16;  in vdpp2_params_to_reg()
1137 …     dst_reg->common.reg14.sw_vdpp_src_pic_width = src_params->src_width + src_right_redundant - 1;  in vdpp2_params_to_reg()
1181     zme_params->src_width = src_params->src_width;  in vdpp2_params_to_reg()
1415     param->src_width = 1920;  in vdpp2_set_default_param()
1513         ctx->params.src_width = param->com.src_width;  in vdpp2_set_param()
1523             ctx->params.src_width_vir = MPP_ALIGN(ctx->params.src_width, 16);  in vdpp2_set_param()
1527             ctx->params.dst_width = ctx->params.src_width;  in vdpp2_set_param()
1570         ctx->params.src_width = param->com2.src_width;  in vdpp2_set_param()
1628         params->src_width_vir < params->src_width) {  in check_cap()
1630                   params->src_width, params->src_height,  in check_cap()
1644         (params->src_width < VDPP2_MODE_MIN_WIDTH) ||  in check_cap()
1648                   params->src_width, params->src_height,  in check_cap()
1686     if ((params->src_width & 1) || (params->src_height & 1) ||  in check_cap()
1690                   params->src_width, params->src_height, params->dst_width, params->dst_height);  in check_cap()
1732         (params->src_width < VDPP2_MODE_MIN_WIDTH)) {  in check_cap()
1734                   params->src_width, params->src_height,  in check_cap()
1755               params->src_width, params->src_width_vir,  in check_cap()