Lines Matching refs:src_params
287 static void update_dci_ctl(struct vdpp2_params* src_params) in update_dci_ctl() argument
291 if (MPP_FRAME_FMT_IS_YUV(src_params->src_fmt)) { in update_dci_ctl()
292 dci_format = vdpp_src_yuv_cfg[src_params->src_fmt - MPP_FRAME_FMT_YUV].format; in update_dci_ctl()
293 dci_alpha_swap = vdpp_src_yuv_cfg[src_params->src_fmt - MPP_FRAME_FMT_YUV].alpha_swap; in update_dci_ctl()
294 dci_rbuv_swap = vdpp_src_yuv_cfg[src_params->src_fmt - MPP_FRAME_FMT_YUV].rbuv_swap; in update_dci_ctl()
295 } else if (MPP_FRAME_FMT_IS_RGB(src_params->src_fmt)) { in update_dci_ctl()
296 dci_format = vdpp_src_rgb_cfg[src_params->src_fmt - MPP_FRAME_FMT_RGB].format; in update_dci_ctl()
297 dci_alpha_swap = vdpp_src_rgb_cfg[src_params->src_fmt - MPP_FRAME_FMT_RGB].alpha_swap; in update_dci_ctl()
298 dci_rbuv_swap = vdpp_src_rgb_cfg[src_params->src_fmt - MPP_FRAME_FMT_RGB].rbuv_swap; in update_dci_ctl()
300 mpp_err("warning: invalid input format %d", src_params->src_fmt); in update_dci_ctl()
304 src_params->dci_format = dci_format; in update_dci_ctl()
305 src_params->dci_alpha_swap = dci_alpha_swap; in update_dci_ctl()
306 src_params->dci_rbuv_swap = dci_rbuv_swap; in update_dci_ctl()
308 VDPP2_DBG(VDPP2_DBG_TRACE, "input format %d dci_format %d", src_params->src_fmt, dci_format); in update_dci_ctl()
311 static void set_hist_to_vdpp2_reg(struct vdpp2_params* src_params, struct vdpp2_reg* dst_reg) in set_hist_to_vdpp2_reg() argument
317 update_dci_ctl(src_params); in set_hist_to_vdpp2_reg()
319 pic_vir_src_ystride = (src_params->src_width + 3) / 4; in set_hist_to_vdpp2_reg()
321 if (src_params->dci_format == VDPP_DCI_FMT_RGB888) { in set_hist_to_vdpp2_reg()
322 pic_vir_src_ystride = src_params->src_width_vir * 3 / 4; in set_hist_to_vdpp2_reg()
323 } else if (src_params->dci_format == VDPP_DCI_FMT_ARGB8888) { in set_hist_to_vdpp2_reg()
324 pic_vir_src_ystride = src_params->src_width_vir * 4 / 4; in set_hist_to_vdpp2_reg()
325 } else if (src_params->dci_format == VDPP_DCI_FMT_Y_10bit_SP) { // Y 10bit SP in set_hist_to_vdpp2_reg()
326 pic_vir_src_ystride = src_params->src_width_vir * 10 / 8 / 4; in set_hist_to_vdpp2_reg()
327 } else if (src_params->dci_format == VDPP_DCI_FMT_Y_8bit_SP) { // Y 8bit SP in set_hist_to_vdpp2_reg()
328 pic_vir_src_ystride = src_params->src_width_vir / 4; in set_hist_to_vdpp2_reg()
330 mpp_err("warning: unsupported dci format %d", src_params->dci_format); in set_hist_to_vdpp2_reg()
334 dci_hsd_mode = (src_params->dci_hsd_mode & 1); in set_hist_to_vdpp2_reg()
335 dci_vsd_mode = (src_params->dci_vsd_mode & 3); in set_hist_to_vdpp2_reg()
339 (src_params->src_width_vir > VDPP2_HIST_HSD_DISABLE_LIMIT)) { in set_hist_to_vdpp2_reg()
341 src_params->src_width_vir, dci_hsd_mode); in set_hist_to_vdpp2_reg()
346 (src_params->src_height_vir > VDPP2_HIST_VSD_DISABLE_LIMIT)) { in set_hist_to_vdpp2_reg()
348 src_params->src_height_vir, dci_vsd_mode); in set_hist_to_vdpp2_reg()
353 (src_params->src_height_vir > VDPP2_HIST_VSD_MODE_1_LIMIT)) { in set_hist_to_vdpp2_reg()
355 src_params->src_height_vir, dci_vsd_mode); in set_hist_to_vdpp2_reg()
359 dci_vsd_mode = (src_params->working_mode == VDPP_WORK_MODE_VEP) ? 0 : dci_vsd_mode; in set_hist_to_vdpp2_reg()
360 dci_hsd_mode = (src_params->working_mode == VDPP_WORK_MODE_VEP) ? 0 : dci_hsd_mode; in set_hist_to_vdpp2_reg()
389 if (src_params->src_height < 1080) in set_hist_to_vdpp2_reg()
390 sw_dci_blk_vsize = src_params->src_height / (16 * vsd_sample_num); in set_hist_to_vdpp2_reg()
392 … sw_dci_blk_vsize = (src_params->src_height + (16 * vsd_sample_num - 1)) / (16 * vsd_sample_num); in set_hist_to_vdpp2_reg()
394 if (src_params->src_width < 1080) in set_hist_to_vdpp2_reg()
395 sw_dci_blk_hsize = src_params->src_width / (16 * hsd_sample_num); in set_hist_to_vdpp2_reg()
397 … sw_dci_blk_hsize = (src_params->src_width + (16 * hsd_sample_num - 1)) / (16 * hsd_sample_num); in set_hist_to_vdpp2_reg()
399 dst_reg->common.reg1.sw_dci_en = src_params->hist_cnt_en; in set_hist_to_vdpp2_reg()
401 dst_reg->dci.reg0.sw_dci_yrgb_addr = src_params->src.y; in set_hist_to_vdpp2_reg()
403 dst_reg->dci.reg1.sw_dci_yrgb_gather_num = src_params->dci_yrgb_gather_num; in set_hist_to_vdpp2_reg()
404 dst_reg->dci.reg1.sw_dci_yrgb_gather_en = src_params->dci_yrgb_gather_en; in set_hist_to_vdpp2_reg()
405 …dst_reg->dci.reg2.sw_vdpp_src_pic_width = MPP_ALIGN_DOWN(src_params->src_width, hsd_sample_num) - … in set_hist_to_vdpp2_reg()
406 …dst_reg->dci.reg2.sw_vdpp_src_pic_height = MPP_ALIGN_DOWN(src_params->src_height, vsd_sample_num) … in set_hist_to_vdpp2_reg()
407 dst_reg->dci.reg3.sw_dci_data_format = src_params->dci_format; in set_hist_to_vdpp2_reg()
408 dst_reg->dci.reg3.sw_dci_csc_range = src_params->dci_csc_range; in set_hist_to_vdpp2_reg()
411 dst_reg->dci.reg3.sw_dci_alpha_swap = src_params->dci_alpha_swap; in set_hist_to_vdpp2_reg()
412 dst_reg->dci.reg3.sw_dci_rb_swap = src_params->dci_rbuv_swap; in set_hist_to_vdpp2_reg()
415 dst_reg->dci.reg4.sw_dci_hist_addr = src_params->hist; in set_hist_to_vdpp2_reg()
430 static void set_es_to_vdpp2_reg(struct vdpp2_params* src_params, struct vdpp2_reg* dst_reg) in set_es_to_vdpp2_reg() argument
432 EsParams *p_es_param = &src_params->es_params; in set_es_to_vdpp2_reg()
500 static void set_shp_to_vdpp2_reg(struct vdpp2_params* src_params, struct vdpp2_reg* dst_reg) in set_shp_to_vdpp2_reg() argument
502 ShpParams *p_shp_param = &src_params->shp_params; in set_shp_to_vdpp2_reg()
1079 static MPP_RET vdpp2_params_to_reg(struct vdpp2_params* src_params, struct vdpp2_api_ctx *ctx) in vdpp2_params_to_reg() argument
1082 struct zme_params *zme_params = &src_params->zme_params; in vdpp2_params_to_reg()
1090 dst_reg->common.reg1.sw_vdpp_src_yuv_swap = src_params->src_yuv_swap; in vdpp2_params_to_reg()
1092 if (MPP_FMT_YUV420SP_VU == src_params->src_fmt) in vdpp2_params_to_reg()
1095 dst_reg->common.reg1.sw_vdpp_dst_fmt = src_params->dst_fmt; in vdpp2_params_to_reg()
1096 dst_reg->common.reg1.sw_vdpp_dst_yuv_swap = src_params->dst_yuv_swap; in vdpp2_params_to_reg()
1097 dst_reg->common.reg1.sw_vdpp_dbmsr_en = (src_params->working_mode == VDPP_WORK_MODE_DCI) in vdpp2_params_to_reg()
1099 : src_params->dmsr_params.dmsr_enable; in vdpp2_params_to_reg()
1102 dst_reg->common.reg2.sw_vdpp_working_mode = src_params->working_mode; in vdpp2_params_to_reg()
1103 VDPP2_DBG(VDPP2_DBG_TRACE, "working_mode %d", src_params->working_mode); in vdpp2_params_to_reg()
1127 …RK_U32 src_right_redundant = src_params->src_width % 16 == 0 ? 0 : 16 - src_params->src_width % 16; in vdpp2_params_to_reg()
1128 … RK_U32 src_down_redundant = src_params->src_height % 8 == 0 ? 0 : 8 - src_params->src_height % 8; in vdpp2_params_to_reg()
1129 …RK_U32 dst_right_redundant = src_params->dst_width % 16 == 0 ? 0 : 16 - src_params->dst_width % 16; in vdpp2_params_to_reg()
1131 dst_reg->common.reg12.sw_vdpp_src_vir_y_stride = src_params->src_width_vir / 4; in vdpp2_params_to_reg()
1134 dst_reg->common.reg13.sw_vdpp_dst_vir_y_stride = src_params->dst_width_vir / 4; in vdpp2_params_to_reg()
1137 … dst_reg->common.reg14.sw_vdpp_src_pic_width = src_params->src_width + src_right_redundant - 1; in vdpp2_params_to_reg()
1139 … dst_reg->common.reg14.sw_vdpp_src_pic_height = src_params->src_height + src_down_redundant - 1; in vdpp2_params_to_reg()
1143 … dst_reg->common.reg15.sw_vdpp_dst_pic_width = src_params->dst_width + dst_right_redundant - 1; in vdpp2_params_to_reg()
1145 dst_reg->common.reg15.sw_vdpp_dst_pic_height = src_params->dst_height - 1; in vdpp2_params_to_reg()
1152 dst_reg->common.reg24.sw_vdpp_src_addr_y = src_params->src.y; in vdpp2_params_to_reg()
1155 dst_reg->common.reg25.sw_vdpp_src_addr_uv = src_params->src.cbcr; in vdpp2_params_to_reg()
1158 dst_reg->common.reg26.sw_vdpp_dst_addr_y = src_params->dst.y; in vdpp2_params_to_reg()
1161 dst_reg->common.reg27.sw_vdpp_dst_addr_uv = src_params->dst.cbcr; in vdpp2_params_to_reg()
1163 if (src_params->yuv_out_diff) { in vdpp2_params_to_reg()
1164 …RK_U32 dst_right_redundant_c = src_params->dst_c_width % 16 == 0 ? 0 : 16 - src_params->dst_c_widt… in vdpp2_params_to_reg()
1166 dst_reg->common.reg1.sw_vdpp_yuvout_diff_en = src_params->yuv_out_diff; in vdpp2_params_to_reg()
1167 dst_reg->common.reg13.sw_vdpp_dst_vir_c_stride = src_params->dst_c_width_vir / 4; in vdpp2_params_to_reg()
1169 …dst_reg->common.reg16.sw_vdpp_dst_pic_width_c = src_params->dst_c_width + dst_right_redundant_c - … in vdpp2_params_to_reg()
1171 dst_reg->common.reg16.sw_vdpp_dst_pic_height_c = src_params->dst_c_height - 1; in vdpp2_params_to_reg()
1173 dst_reg->common.reg27.sw_vdpp_dst_addr_uv = src_params->dst_c.cbcr; in vdpp2_params_to_reg()
1176 set_dmsr_to_vdpp_reg(&src_params->dmsr_params, &ctx->dmsr); in vdpp2_params_to_reg()
1177 set_hist_to_vdpp2_reg(src_params, dst_reg); in vdpp2_params_to_reg()
1178 set_es_to_vdpp2_reg(src_params, dst_reg); in vdpp2_params_to_reg()
1179 set_shp_to_vdpp2_reg(src_params, dst_reg); in vdpp2_params_to_reg()
1181 zme_params->src_width = src_params->src_width; in vdpp2_params_to_reg()
1182 zme_params->src_height = src_params->src_height; in vdpp2_params_to_reg()
1183 zme_params->dst_width = src_params->dst_width; in vdpp2_params_to_reg()
1184 zme_params->dst_height = src_params->dst_height; in vdpp2_params_to_reg()
1185 zme_params->dst_fmt = src_params->dst_fmt; in vdpp2_params_to_reg()
1186 zme_params->yuv_out_diff = src_params->yuv_out_diff; in vdpp2_params_to_reg()
1187 zme_params->dst_c_width = src_params->dst_c_width; in vdpp2_params_to_reg()
1188 zme_params->dst_c_height = src_params->dst_c_height; in vdpp2_params_to_reg()