Lines Matching refs:params
1466 memset(&ctx->params, 0, sizeof(struct vdpp2_params)); in vdpp2_init()
1468 vdpp2_set_default_param(&ctx->params); in vdpp2_init()
1507 ctx->params.hist_cnt_en = 0; // default disable in vdpp2_set_param()
1509 ctx->params.src_fmt = VDPP_FMT_YUV420; // default 420 in vdpp2_set_param()
1510 ctx->params.src_yuv_swap = param->com.sswap; in vdpp2_set_param()
1511 ctx->params.dst_fmt = param->com.dfmt; in vdpp2_set_param()
1512 ctx->params.dst_yuv_swap = param->com.dswap; in vdpp2_set_param()
1513 ctx->params.src_width = param->com.src_width; in vdpp2_set_param()
1514 ctx->params.src_height = param->com.src_height; in vdpp2_set_param()
1515 ctx->params.dst_width = param->com.dst_width; in vdpp2_set_param()
1516 ctx->params.dst_height = param->com.dst_height; in vdpp2_set_param()
1518 ctx->params.dmsr_params.dmsr_enable = 1; in vdpp2_set_param()
1519 ctx->params.es_params.es_bEnabledES = 1; in vdpp2_set_param()
1520 ctx->params.shp_params.sharp_enable = 1; in vdpp2_set_param()
1522 if (!ctx->params.src_width_vir) in vdpp2_set_param()
1523 ctx->params.src_width_vir = MPP_ALIGN(ctx->params.src_width, 16); in vdpp2_set_param()
1524 if (!ctx->params.src_height_vir) in vdpp2_set_param()
1525 ctx->params.src_height_vir = MPP_ALIGN(ctx->params.src_height, 8); in vdpp2_set_param()
1526 if (!ctx->params.dst_width) in vdpp2_set_param()
1527 ctx->params.dst_width = ctx->params.src_width; in vdpp2_set_param()
1528 if (!ctx->params.dst_height) in vdpp2_set_param()
1529 ctx->params.dst_height = ctx->params.src_height; in vdpp2_set_param()
1530 if (!ctx->params.dst_width_vir) in vdpp2_set_param()
1531 ctx->params.dst_width_vir = MPP_ALIGN(ctx->params.dst_width, 16); in vdpp2_set_param()
1532 if (!ctx->params.dst_height_vir) in vdpp2_set_param()
1533 ctx->params.dst_height_vir = MPP_ALIGN(ctx->params.dst_height, 2); in vdpp2_set_param()
1535 if (!ctx->params.dst_c_width) in vdpp2_set_param()
1536 ctx->params.dst_c_width = ctx->params.dst_width; in vdpp2_set_param()
1537 if (!ctx->params.dst_c_width_vir) in vdpp2_set_param()
1538 ctx->params.dst_c_width_vir = MPP_ALIGN(ctx->params.dst_c_width, 16); in vdpp2_set_param()
1539 if (!ctx->params.dst_c_height) in vdpp2_set_param()
1540 ctx->params.dst_c_height = ctx->params.dst_height; in vdpp2_set_param()
1541 if (!ctx->params.dst_c_height_vir) in vdpp2_set_param()
1542 ctx->params.dst_c_height_vir = MPP_ALIGN(ctx->params.dst_c_height, 2); in vdpp2_set_param()
1543 update_dci_ctl(&ctx->params); in vdpp2_set_param()
1546 memcpy(&ctx->params.dmsr_params, ¶m->dmsr, sizeof(struct dmsr_params)); in vdpp2_set_param()
1549 ctx->params.zme_params.zme_bypass_en = param->zme.bypass_enable; in vdpp2_set_param()
1550 ctx->params.zme_params.zme_dering_enable = param->zme.dering_enable; in vdpp2_set_param()
1551 ctx->params.zme_params.zme_dering_sen_0 = param->zme.dering_sen_0; in vdpp2_set_param()
1552 ctx->params.zme_params.zme_dering_sen_1 = param->zme.dering_sen_1; in vdpp2_set_param()
1553 ctx->params.zme_params.zme_dering_blend_alpha = param->zme.dering_blend_alpha; in vdpp2_set_param()
1554 ctx->params.zme_params.zme_dering_blend_beta = param->zme.dering_blend_beta; in vdpp2_set_param()
1558 ctx->params.zme_params.zme_tap8_coeff = param->zme.tap8_coeff; in vdpp2_set_param()
1560 ctx->params.zme_params.zme_tap6_coeff = param->zme.tap6_coeff; in vdpp2_set_param()
1566 ctx->params.src_yuv_swap = param->com2.sswap; in vdpp2_set_param()
1567 ctx->params.src_fmt = param->com2.sfmt; in vdpp2_set_param()
1568 ctx->params.dst_fmt = param->com2.dfmt; in vdpp2_set_param()
1569 ctx->params.dst_yuv_swap = param->com2.dswap; in vdpp2_set_param()
1570 ctx->params.src_width = param->com2.src_width; in vdpp2_set_param()
1571 ctx->params.src_height = param->com2.src_height; in vdpp2_set_param()
1572 ctx->params.src_width_vir = param->com2.src_width_vir; in vdpp2_set_param()
1573 ctx->params.src_height_vir = param->com2.src_height_vir; in vdpp2_set_param()
1574 ctx->params.dst_width = param->com2.dst_width; in vdpp2_set_param()
1575 ctx->params.dst_height = param->com2.dst_height; in vdpp2_set_param()
1576 ctx->params.dst_width_vir = param->com2.dst_width_vir; in vdpp2_set_param()
1577 ctx->params.dst_height_vir = param->com2.dst_height_vir; in vdpp2_set_param()
1578 ctx->params.yuv_out_diff = param->com2.yuv_out_diff; in vdpp2_set_param()
1579 ctx->params.dst_c_width = param->com2.dst_c_width; in vdpp2_set_param()
1580 ctx->params.dst_c_height = param->com2.dst_c_height; in vdpp2_set_param()
1581 ctx->params.dst_c_width_vir = param->com2.dst_c_width_vir; in vdpp2_set_param()
1582 ctx->params.dst_c_height_vir = param->com2.dst_c_height_vir; in vdpp2_set_param()
1583 ctx->params.working_mode = param->com2.hist_mode_en ? in vdpp2_set_param()
1586 ctx->params.dmsr_params.dmsr_enable = (cfg_set & VDPP_DMSR_EN) ? 1 : 0; in vdpp2_set_param()
1588 ctx->params.es_params.es_bEnabledES = (cfg_set & VDPP_ES_EN) ? 1 : 0; in vdpp2_set_param()
1590 ctx->params.shp_params.sharp_enable = (cfg_set & VDPP_SHARP_EN) ? 1 : 0; in vdpp2_set_param()
1591 update_dci_ctl(&ctx->params); in vdpp2_set_param()
1594 memcpy(&ctx->params.es_params, ¶m->es, sizeof(EsParams)); in vdpp2_set_param()
1595 update_es_tan(&ctx->params.es_params); in vdpp2_set_param()
1598 ctx->params.hist_cnt_en = param->hist.hist_cnt_en; in vdpp2_set_param()
1599 ctx->params.dci_hsd_mode = param->hist.dci_hsd_mode; in vdpp2_set_param()
1600 ctx->params.dci_vsd_mode = param->hist.dci_vsd_mode; in vdpp2_set_param()
1601 ctx->params.dci_yrgb_gather_num = param->hist.dci_yrgb_gather_num; in vdpp2_set_param()
1602 ctx->params.dci_yrgb_gather_en = param->hist.dci_yrgb_gather_en; in vdpp2_set_param()
1603 ctx->params.dci_csc_range = param->hist.dci_csc_range; in vdpp2_set_param()
1604 update_dci_ctl(&ctx->params); in vdpp2_set_param()
1607 memcpy(&ctx->params.shp_params, ¶m->sharp, sizeof(ShpParams)); in vdpp2_set_param()
1616 static RK_S32 check_cap(struct vdpp2_params *params) in check_cap() argument
1622 if (NULL == params) { in check_cap()
1627 if (params->src_height_vir < params->src_height || in check_cap()
1628 params->src_width_vir < params->src_width) { in check_cap()
1630 params->src_width, params->src_height, in check_cap()
1631 params->src_width_vir, params->src_height_vir); in check_cap()
1635 if ((params->src_fmt != MPP_FMT_YUV420SP) && in check_cap()
1636 (params->src_fmt != MPP_FMT_YUV420SP_VU)) { in check_cap()
1641 if ((params->src_height_vir > VDPP2_VEP_MAX_HEIGHT) || in check_cap()
1642 (params->src_width_vir > VDPP2_VEP_MAX_WIDTH) || in check_cap()
1643 (params->src_height < VDPP2_MODE_MIN_HEIGH) || in check_cap()
1644 (params->src_width < VDPP2_MODE_MIN_WIDTH) || in check_cap()
1645 (params->src_height_vir < VDPP2_MODE_MIN_HEIGH) || in check_cap()
1646 (params->src_width_vir < VDPP2_MODE_MIN_WIDTH)) { in check_cap()
1648 params->src_width, params->src_height, in check_cap()
1649 params->src_width_vir, params->src_height_vir); in check_cap()
1653 if ((params->dst_height_vir > VDPP2_VEP_MAX_HEIGHT) || in check_cap()
1654 (params->dst_width_vir > VDPP2_VEP_MAX_WIDTH) || in check_cap()
1655 (params->dst_height < VDPP2_MODE_MIN_HEIGH) || in check_cap()
1656 (params->dst_width < VDPP2_MODE_MIN_WIDTH) || in check_cap()
1657 (params->dst_height_vir < VDPP2_MODE_MIN_HEIGH) || in check_cap()
1658 (params->dst_width_vir < VDPP2_MODE_MIN_WIDTH) || in check_cap()
1659 (params->dst_height_vir < params->dst_height) || in check_cap()
1660 (params->dst_width_vir < params->dst_width)) { in check_cap()
1662 params->dst_width, params->dst_height, in check_cap()
1663 params->dst_width_vir, params->dst_height_vir); in check_cap()
1667 if ((params->src_width_vir & 0xf) || (params->dst_width_vir & 0xf)) { in check_cap()
1670 params->src_width_vir, params->dst_width_vir); in check_cap()
1674 if (params->src_height_vir & 0x7) { in check_cap()
1676 VDPP2_DBG(VDPP2_DBG_CHECK, "vep unsupported src img_h_vir %d\n", params->src_height_vir); in check_cap()
1680 if (params->dst_height_vir & 0x1) { in check_cap()
1682 VDPP2_DBG(VDPP2_DBG_CHECK, "vep unsupported dst img_h_vir %d\n", params->dst_height_vir); in check_cap()
1686 if ((params->src_width & 1) || (params->src_height & 1) || in check_cap()
1687 (params->dst_width & 1) || (params->dst_height & 1)) { in check_cap()
1690 params->src_width, params->src_height, params->dst_width, params->dst_height); in check_cap()
1694 if (params->yuv_out_diff) { in check_cap()
1695 if ((params->dst_c_height_vir > VDPP2_VEP_MAX_HEIGHT) || in check_cap()
1696 (params->dst_c_width_vir > VDPP2_VEP_MAX_WIDTH) || in check_cap()
1697 (params->dst_c_height < VDPP2_MODE_MIN_HEIGH) || in check_cap()
1698 (params->dst_c_width < VDPP2_MODE_MIN_WIDTH) || in check_cap()
1699 (params->dst_c_height_vir < VDPP2_MODE_MIN_HEIGH) || in check_cap()
1700 (params->dst_c_width_vir < VDPP2_MODE_MIN_WIDTH) || in check_cap()
1701 (params->dst_c_height_vir < params->dst_c_height) || in check_cap()
1702 (params->dst_c_width_vir < params->dst_c_width)) { in check_cap()
1704 params->dst_c_width, params->dst_c_height, in check_cap()
1705 params->dst_c_width_vir, params->dst_c_height_vir); in check_cap()
1709 if (params->dst_c_width_vir & 0xf) { in check_cap()
1711 … VDPP2_DBG(VDPP2_DBG_CHECK, "vep unsupported dst img_w_c_vir %d\n", params->dst_c_width_vir); in check_cap()
1715 if (params->dst_c_height_vir & 0x1) { in check_cap()
1717 … VDPP2_DBG(VDPP2_DBG_CHECK, "vep unsupported dst img_h_vir %d\n", params->dst_c_height_vir); in check_cap()
1721 if ((params->dst_c_width & 1) || (params->dst_c_height & 1)) { in check_cap()
1724 params->dst_c_width, params->dst_c_height); in check_cap()
1729 if ((params->src_height_vir > VDPP2_HIST_MAX_HEIGHT) || in check_cap()
1730 (params->src_width_vir > VDPP2_HIST_MAX_WIDTH) || in check_cap()
1731 (params->src_height < VDPP2_MODE_MIN_HEIGH) || in check_cap()
1732 (params->src_width < VDPP2_MODE_MIN_WIDTH)) { in check_cap()
1734 params->src_width, params->src_height, in check_cap()
1735 params->src_width_vir, params->src_height_vir); in check_cap()
1740 if ((params->src_fmt == MPP_FMT_YUV420SP_10BIT) || in check_cap()
1741 (params->src_fmt == MPP_FMT_YUV422SP_10BIT) || in check_cap()
1742 (params->src_fmt == MPP_FMT_YUV444SP_10BIT)) { in check_cap()
1743 if (params->src_width_vir & 0xf) { in check_cap()
1748 if (params->src_width_vir & 0x3) { in check_cap()
1755 params->src_width, params->src_width_vir, in check_cap()
1756 params->src_height, params->src_height_vir); in check_cap()
1758 params->dst_width, params->dst_width_vir, in check_cap()
1759 params->dst_height, params->dst_height_vir); in check_cap()
1790 work_mode = ctx->params.working_mode; in vdpp2_start()
1791 ret_cap = check_cap(&ctx->params); in vdpp2_start()
1806 vdpp2_params_to_reg(&ctx->params, ctx); in vdpp2_start()
1872 reg_off[0].offset = ctx->params.src.cbcr_offset; in vdpp2_start()
1875 if (!ctx->params.yuv_out_diff) in vdpp2_start()
1876 reg_off[1].offset = ctx->params.dst.cbcr_offset; in vdpp2_start()
1878 reg_off[1].offset = ctx->params.dst_c.cbcr_offset; in vdpp2_start()
2000 set_addr(&ctx->params.src, (VdppImg *)iparam); in vdpp2_control()
2003 set_addr(&ctx->params.dst, (VdppImg *)iparam); in vdpp2_control()
2006 set_addr(&ctx->params.dst_c, (VdppImg *)iparam); in vdpp2_control()
2009 ctx->params.hist = *(RK_S32 *)iparam; in vdpp2_control()
2037 return check_cap(&ctx->params); in vdpp2_check_cap()