Lines Matching refs:common

31     dst_reg->common.reg0.sw_vdpp_frm_en = 1;  in vdpp_params_to_reg()
34 dst_reg->common.reg1.sw_vdpp_src_fmt = VDPP_FMT_YUV420; in vdpp_params_to_reg()
35 dst_reg->common.reg1.sw_vdpp_src_yuv_swap = src_params->src_yuv_swap; in vdpp_params_to_reg()
36 dst_reg->common.reg1.sw_vdpp_dst_fmt = src_params->dst_fmt; in vdpp_params_to_reg()
37 dst_reg->common.reg1.sw_vdpp_dst_yuv_swap = src_params->dst_yuv_swap; in vdpp_params_to_reg()
38 dst_reg->common.reg1.sw_vdpp_dbmsr_en = src_params->dmsr_params.dmsr_enable; in vdpp_params_to_reg()
41 dst_reg->common.reg2.sw_vdpp_working_mode = VDPP_WORK_MODE_VEP; in vdpp_params_to_reg()
44 dst_reg->common.reg4.sw_vdpp_clk_on = 1; in vdpp_params_to_reg()
45 dst_reg->common.reg4.sw_md_clk_on = 1; in vdpp_params_to_reg()
46 dst_reg->common.reg4.sw_dect_clk_on = 1; in vdpp_params_to_reg()
47 dst_reg->common.reg4.sw_me_clk_on = 1; in vdpp_params_to_reg()
48 dst_reg->common.reg4.sw_mc_clk_on = 1; in vdpp_params_to_reg()
49 dst_reg->common.reg4.sw_eedi_clk_on = 1; in vdpp_params_to_reg()
50 dst_reg->common.reg4.sw_ble_clk_on = 1; in vdpp_params_to_reg()
51 dst_reg->common.reg4.sw_out_clk_on = 1; in vdpp_params_to_reg()
52 dst_reg->common.reg4.sw_ctrl_clk_on = 1; in vdpp_params_to_reg()
53 dst_reg->common.reg4.sw_ram_clk_on = 1; in vdpp_params_to_reg()
54 dst_reg->common.reg4.sw_dma_clk_on = 1; in vdpp_params_to_reg()
55 dst_reg->common.reg4.sw_reg_clk_on = 1; in vdpp_params_to_reg()
58 dst_reg->common.reg8.sw_vdpp_frm_done_en = 1; in vdpp_params_to_reg()
59 dst_reg->common.reg8.sw_vdpp_osd_max_en = 1; in vdpp_params_to_reg()
60 dst_reg->common.reg8.sw_vdpp_bus_error_en = 1; in vdpp_params_to_reg()
61 dst_reg->common.reg8.sw_vdpp_timeout_int_en = 1; in vdpp_params_to_reg()
62 dst_reg->common.reg8.sw_vdpp_config_error_en = 1; in vdpp_params_to_reg()
69 …dst_reg->common.reg12.sw_vdpp_src_vir_y_stride = (src_params->src_width + src_right_redundant + 3)… in vdpp_params_to_reg()
72 …dst_reg->common.reg13.sw_vdpp_dst_vir_y_stride = (src_params->dst_width + dst_right_redundant + 3)… in vdpp_params_to_reg()
75 … dst_reg->common.reg14.sw_vdpp_src_pic_width = src_params->src_width + src_right_redundant - 1; in vdpp_params_to_reg()
76 dst_reg->common.reg14.sw_vdpp_src_right_redundant = src_right_redundant; in vdpp_params_to_reg()
77 … dst_reg->common.reg14.sw_vdpp_src_pic_height = src_params->src_height + src_down_redundant - 1; in vdpp_params_to_reg()
78 dst_reg->common.reg14.sw_vdpp_src_down_redundant = src_down_redundant; in vdpp_params_to_reg()
81 … dst_reg->common.reg15.sw_vdpp_dst_pic_width = src_params->dst_width + dst_right_redundant - 1; in vdpp_params_to_reg()
82 dst_reg->common.reg15.sw_vdpp_dst_right_redundant = dst_right_redundant; in vdpp_params_to_reg()
83 dst_reg->common.reg15.sw_vdpp_dst_pic_height = src_params->dst_height - 1; in vdpp_params_to_reg()
86 dst_reg->common.reg20.sw_vdpp_timeout_en = 1; in vdpp_params_to_reg()
87 dst_reg->common.reg20.sw_vdpp_timeout_cnt = 0x8FFFFFF; in vdpp_params_to_reg()
90 dst_reg->common.reg24.sw_vdpp_src_addr_y = src_params->src.y; in vdpp_params_to_reg()
93 dst_reg->common.reg25.sw_vdpp_src_addr_uv = src_params->src.cbcr; in vdpp_params_to_reg()
96 dst_reg->common.reg26.sw_vdpp_dst_addr_y = src_params->dst.y; in vdpp_params_to_reg()
99 dst_reg->common.reg27.sw_vdpp_dst_addr_uv = src_params->dst.cbcr; in vdpp_params_to_reg()
372 mpp_req[req_cnt].size = sizeof(zme->common); in vdpp_start()
374 mpp_req[req_cnt].data_ptr = REQ_DATA_PTR(&zme->common); in vdpp_start()
398 mpp_req[req_cnt].size = sizeof(reg->common); in vdpp_start()
400 mpp_req[req_cnt].data_ptr = REQ_DATA_PTR(&reg->common); in vdpp_start()
405 mpp_req[req_cnt].size = sizeof(reg->common); in vdpp_start()
407 mpp_req[req_cnt].data_ptr = REQ_DATA_PTR(&reg->common); in vdpp_start()
454 VDPP_DBG(VDPP_DBG_INT, "ro_frm_done_sts=%d\n", reg->common.reg10.ro_frm_done_sts); in vdpp_done()
455 VDPP_DBG(VDPP_DBG_INT, "ro_osd_max_sts=%d\n", reg->common.reg10.ro_osd_max_sts); in vdpp_done()
456 VDPP_DBG(VDPP_DBG_INT, "ro_bus_error_sts=%d\n", reg->common.reg10.ro_bus_error_sts); in vdpp_done()
457 VDPP_DBG(VDPP_DBG_INT, "ro_timeout_sts=%d\n", reg->common.reg10.ro_timeout_sts); in vdpp_done()
458 VDPP_DBG(VDPP_DBG_INT, "ro_config_error_sts=%d\n", reg->common.reg10.ro_timeout_sts); in vdpp_done()
460 if (reg->common.reg8.sw_vdpp_frm_done_en && in vdpp_done()
461 !reg->common.reg10.ro_frm_done_sts) { in vdpp_done()