Lines Matching refs:regs
54 if (NULL == ctx->regs) { in hal_vp8d_vdpu2_init()
55 ctx->regs = mpp_calloc_size(void, sizeof(VP8DRegSet_t)); in hal_vp8d_vdpu2_init()
56 if (NULL == ctx->regs) { in hal_vp8d_vdpu2_init()
96 if (ctx->regs) { in hal_vp8d_vdpu2_init()
97 mpp_free(ctx->regs); in hal_vp8d_vdpu2_init()
98 ctx->regs = NULL; in hal_vp8d_vdpu2_init()
152 if (ctx->regs) { in hal_vp8d_vdpu2_deinit()
153 mpp_free(ctx->regs); in hal_vp8d_vdpu2_deinit()
154 ctx->regs = NULL; in hal_vp8d_vdpu2_deinit()
164 VP8DRegSet_t *reg = (VP8DRegSet_t *)ctx->regs; in hal_vp8_init_hwcfg()
202 VP8DRegSet_t *regs = (VP8DRegSet_t *)ctx->regs; in hal_vp8d_pre_filter_tap_set() local
205 regs->reg59.sw_pred_bc_tap_0_0 = mcFilter[0][1]; in hal_vp8d_pre_filter_tap_set()
206 regs->reg59.sw_pred_bc_tap_0_1 = mcFilter[0][2]; in hal_vp8d_pre_filter_tap_set()
207 regs->reg59.sw_pred_bc_tap_0_2 = mcFilter[0][3]; in hal_vp8d_pre_filter_tap_set()
208 regs->reg153.sw_pred_bc_tap_0_3 = mcFilter[0][4]; in hal_vp8d_pre_filter_tap_set()
209 regs->reg153.sw_pred_bc_tap_1_0 = mcFilter[1][1]; in hal_vp8d_pre_filter_tap_set()
210 regs->reg153.sw_pred_bc_tap_1_1 = mcFilter[1][2]; in hal_vp8d_pre_filter_tap_set()
211 regs->reg154.sw_pred_bc_tap_1_2 = mcFilter[1][3]; in hal_vp8d_pre_filter_tap_set()
212 regs->reg154.sw_pred_bc_tap_1_3 = mcFilter[1][4]; in hal_vp8d_pre_filter_tap_set()
213 regs->reg154.sw_pred_bc_tap_2_0 = mcFilter[2][1]; in hal_vp8d_pre_filter_tap_set()
214 regs->reg155.sw_pred_bc_tap_2_1 = mcFilter[2][2]; in hal_vp8d_pre_filter_tap_set()
215 regs->reg155.sw_pred_bc_tap_2_2 = mcFilter[2][3]; in hal_vp8d_pre_filter_tap_set()
216 regs->reg155.sw_pred_bc_tap_2_3 = mcFilter[2][4]; in hal_vp8d_pre_filter_tap_set()
218 regs->reg156.sw_pred_bc_tap_3_0 = mcFilter[3][1]; in hal_vp8d_pre_filter_tap_set()
219 regs->reg156.sw_pred_bc_tap_3_1 = mcFilter[3][2]; in hal_vp8d_pre_filter_tap_set()
220 regs->reg156.sw_pred_bc_tap_3_2 = mcFilter[3][3]; in hal_vp8d_pre_filter_tap_set()
221 regs->reg157.sw_pred_bc_tap_3_3 = mcFilter[3][4]; in hal_vp8d_pre_filter_tap_set()
222 regs->reg157.sw_pred_bc_tap_4_0 = mcFilter[4][1]; in hal_vp8d_pre_filter_tap_set()
223 regs->reg157.sw_pred_bc_tap_4_1 = mcFilter[4][2]; in hal_vp8d_pre_filter_tap_set()
224 regs->reg158.sw_pred_bc_tap_4_2 = mcFilter[4][3]; in hal_vp8d_pre_filter_tap_set()
225 regs->reg158.sw_pred_bc_tap_4_3 = mcFilter[4][4]; in hal_vp8d_pre_filter_tap_set()
226 regs->reg158.sw_pred_bc_tap_5_0 = mcFilter[5][1]; in hal_vp8d_pre_filter_tap_set()
228 regs->reg125.sw_pred_bc_tap_5_1 = mcFilter[5][2]; in hal_vp8d_pre_filter_tap_set()
230 regs->reg125.sw_pred_bc_tap_5_2 = mcFilter[5][3]; in hal_vp8d_pre_filter_tap_set()
232 regs->reg125.sw_pred_bc_tap_5_3 = mcFilter[5][4]; in hal_vp8d_pre_filter_tap_set()
233 regs->reg126.sw_pred_bc_tap_6_0 = mcFilter[6][1]; in hal_vp8d_pre_filter_tap_set()
234 regs->reg126.sw_pred_bc_tap_6_1 = mcFilter[6][2]; in hal_vp8d_pre_filter_tap_set()
235 regs->reg126.sw_pred_bc_tap_6_2 = mcFilter[6][3]; in hal_vp8d_pre_filter_tap_set()
236 regs->reg127.sw_pred_bc_tap_6_3 = mcFilter[6][4]; in hal_vp8d_pre_filter_tap_set()
237 regs->reg127.sw_pred_bc_tap_7_0 = mcFilter[7][1]; in hal_vp8d_pre_filter_tap_set()
238 regs->reg127.sw_pred_bc_tap_7_1 = mcFilter[7][2]; in hal_vp8d_pre_filter_tap_set()
239 regs->reg128.sw_pred_bc_tap_7_2 = mcFilter[7][3]; in hal_vp8d_pre_filter_tap_set()
240 regs->reg128.sw_pred_bc_tap_7_3 = mcFilter[7][4]; in hal_vp8d_pre_filter_tap_set()
242 regs->reg128.sw_pred_tap_2_M1 = mcFilter[2][0]; in hal_vp8d_pre_filter_tap_set()
243 regs->reg128.sw_pred_tap_2_4 = mcFilter[2][5]; in hal_vp8d_pre_filter_tap_set()
244 regs->reg128.sw_pred_tap_4_M1 = mcFilter[4][0]; in hal_vp8d_pre_filter_tap_set()
245 regs->reg128.sw_pred_tap_4_4 = mcFilter[4][5]; in hal_vp8d_pre_filter_tap_set()
246 regs->reg128.sw_pred_tap_6_M1 = mcFilter[6][0]; in hal_vp8d_pre_filter_tap_set()
247 regs->reg128.sw_pred_tap_6_4 = mcFilter[6][5]; in hal_vp8d_pre_filter_tap_set()
261 VP8DRegSet_t *regs = (VP8DRegSet_t *)ctx->regs; in hal_vp8d_dct_partition_cfg() local
268 regs->reg145_bitpl_ctrl_base = fd; in hal_vp8d_dct_partition_cfg()
272 regs->reg122.sw_strm1_start_bit = pic_param->stream_start_bit; in hal_vp8d_dct_partition_cfg()
282 regs->reg51_stream_info.sw_stream_len = len; in hal_vp8d_dct_partition_cfg()
288 regs->reg124.sw_stream1_len = len; in hal_vp8d_dct_partition_cfg()
289 regs->reg124.sw_coeffs_part_am = in hal_vp8d_dct_partition_cfg()
297 regs->reg64_input_stream_base = fd; in hal_vp8d_dct_partition_cfg()
301 regs->reg_dct_strm_base[i - 1] = fd; in hal_vp8d_dct_partition_cfg()
305 regs->reg_dct_strm1_base[i - 6] = fd; in hal_vp8d_dct_partition_cfg()
312 regs->reg122.sw_strm_start_bit = byte_offset * 8; in hal_vp8d_dct_partition_cfg()
315 regs->reg121.sw_dct1_start_bit = byte_offset * 8; in hal_vp8d_dct_partition_cfg()
318 regs->reg121.sw_dct2_start_bit = byte_offset * 8; in hal_vp8d_dct_partition_cfg()
321 regs->reg150.sw_dct_start_bit_3 = byte_offset * 8; in hal_vp8d_dct_partition_cfg()
324 regs->reg150.sw_dct_start_bit_4 = byte_offset * 8; in hal_vp8d_dct_partition_cfg()
327 regs->reg150.sw_dct_start_bit_5 = byte_offset * 8; in hal_vp8d_dct_partition_cfg()
330 regs->reg150.sw_dct_start_bit_6 = byte_offset * 8; in hal_vp8d_dct_partition_cfg()
333 regs->reg150.sw_dct_start_bit_7 = byte_offset * 8; in hal_vp8d_dct_partition_cfg()
449 VP8DRegSet_t *regs = (VP8DRegSet_t *)ctx->regs; in hal_vp8d_vdpu2_gen_regs() local
458 regs->reg120.sw_pic_mb_width = mb_width & 0x1FF; in hal_vp8d_vdpu2_gen_regs()
459 regs->reg120.sw_pic_mb_hight_p = mb_height & 0xFF; in hal_vp8d_vdpu2_gen_regs()
460 regs->reg120.sw_pic_mb_w_ext = mb_width >> 9; in hal_vp8d_vdpu2_gen_regs()
461 regs->reg120.sw_pic_mb_h_ext = mb_height >> 8; in hal_vp8d_vdpu2_gen_regs()
475 regs->reg63_cur_pic_base = mpp_buffer_get_fd(framebuf); in hal_vp8d_vdpu2_gen_regs()
478 regs->reg131_ref0_base = regs->reg63_cur_pic_base; in hal_vp8d_vdpu2_gen_regs()
483 regs->reg131_ref0_base = mpp_buffer_get_fd(framebuf); in hal_vp8d_vdpu2_gen_regs()
485 regs->reg131_ref0_base = regs->reg63_cur_pic_base; in hal_vp8d_vdpu2_gen_regs()
491 regs->reg136_golden_ref_base = mpp_buffer_get_fd(framebuf); in hal_vp8d_vdpu2_gen_regs()
493 regs->reg136_golden_ref_base = regs->reg63_cur_pic_base; in hal_vp8d_vdpu2_gen_regs()
496 regs->reg136_golden_ref_base = regs->reg136_golden_ref_base; in hal_vp8d_vdpu2_gen_regs()
504 regs->reg137.alternate_ref_base = mpp_buffer_get_fd(framebuf); in hal_vp8d_vdpu2_gen_regs()
506 regs->reg137.alternate_ref_base = regs->reg63_cur_pic_base; in hal_vp8d_vdpu2_gen_regs()
509 regs->reg137.alternate_ref_base = regs->reg137.alternate_ref_base; in hal_vp8d_vdpu2_gen_regs()
513 regs->reg149_segment_map_base = regs->reg149_segment_map_base; in hal_vp8d_vdpu2_gen_regs()
518 regs->reg57_enable_ctrl.sw_pic_inter_e = pic_param->frame_type; in hal_vp8d_vdpu2_gen_regs()
519 regs->reg50_dec_ctrl.sw_skip_mode = !pic_param->mb_no_coeff_skip; in hal_vp8d_vdpu2_gen_regs()
522 regs->reg129.sw_filt_level_0 = pic_param->filter_level; in hal_vp8d_vdpu2_gen_regs()
524 regs->reg129.sw_filt_level_0 = pic_param->stVP8Segments.segment_feature_data[1][0]; in hal_vp8d_vdpu2_gen_regs()
525 regs->reg129.sw_filt_level_1 = pic_param->stVP8Segments.segment_feature_data[1][1]; in hal_vp8d_vdpu2_gen_regs()
526 regs->reg129.sw_filt_level_2 = pic_param->stVP8Segments.segment_feature_data[1][2]; in hal_vp8d_vdpu2_gen_regs()
527 regs->reg129.sw_filt_level_3 = pic_param->stVP8Segments.segment_feature_data[1][3]; in hal_vp8d_vdpu2_gen_regs()
529 …regs->reg129.sw_filt_level_0 = CLIP3(0, 63, (RK_S32)pic_param->filter_level + pic_param->stVP8Segm… in hal_vp8d_vdpu2_gen_regs()
530 …regs->reg129.sw_filt_level_1 = CLIP3(0, 63, (RK_S32)pic_param->filter_level + pic_param->stVP8Segm… in hal_vp8d_vdpu2_gen_regs()
531 …regs->reg129.sw_filt_level_2 = CLIP3(0, 63, (RK_S32)pic_param->filter_level + pic_param->stVP8Segm… in hal_vp8d_vdpu2_gen_regs()
532 …regs->reg129.sw_filt_level_3 = CLIP3(0, 63, (RK_S32)pic_param->filter_level + pic_param->stVP8Segm… in hal_vp8d_vdpu2_gen_regs()
535 regs->reg132.sw_filt_type = pic_param->filter_type; in hal_vp8d_vdpu2_gen_regs()
536 regs->reg132.sw_filt_sharpness = pic_param->sharpness; in hal_vp8d_vdpu2_gen_regs()
539 regs->reg50_dec_ctrl.sw_filtering_dis = 1; in hal_vp8d_vdpu2_gen_regs()
543 regs->reg121.sw_romain_mv = 1; in hal_vp8d_vdpu2_gen_regs()
547 regs->reg121.sw_eable_bilinear = 1; in hal_vp8d_vdpu2_gen_regs()
549 regs->reg122.sw_boolean_value = pic_param->bool_value; in hal_vp8d_vdpu2_gen_regs()
550 regs->reg122.sw_boolean_range = pic_param->bool_range; in hal_vp8d_vdpu2_gen_regs()
554 regs->reg130.sw_quant_0 = pic_param->y1ac_delta_q; in hal_vp8d_vdpu2_gen_regs()
556 regs->reg130.sw_quant_0 = pic_param->stVP8Segments.segment_feature_data[0][0]; in hal_vp8d_vdpu2_gen_regs()
557 regs->reg130.sw_quant_1 = pic_param->stVP8Segments.segment_feature_data[0][1]; in hal_vp8d_vdpu2_gen_regs()
558 regs->reg151.sw_quant_2 = pic_param->stVP8Segments.segment_feature_data[0][2]; in hal_vp8d_vdpu2_gen_regs()
559 regs->reg151.sw_quant_3 = pic_param->stVP8Segments.segment_feature_data[0][3]; in hal_vp8d_vdpu2_gen_regs()
561 …regs->reg130.sw_quant_0 = CLIP3(0, 127, pic_param->y1ac_delta_q + pic_param->stVP8Segments.segment… in hal_vp8d_vdpu2_gen_regs()
562 …regs->reg130.sw_quant_1 = CLIP3(0, 127, pic_param->y1ac_delta_q + pic_param->stVP8Segments.segment… in hal_vp8d_vdpu2_gen_regs()
563 …regs->reg151.sw_quant_2 = CLIP3(0, 127, pic_param->y1ac_delta_q + pic_param->stVP8Segments.segment… in hal_vp8d_vdpu2_gen_regs()
564 …regs->reg151.sw_quant_3 = CLIP3(0, 127, pic_param->y1ac_delta_q + pic_param->stVP8Segments.segment… in hal_vp8d_vdpu2_gen_regs()
567 regs->reg130.sw_quant_delta_0 = pic_param->y1dc_delta_q; in hal_vp8d_vdpu2_gen_regs()
568 regs->reg130.sw_quant_delta_1 = pic_param->y2dc_delta_q; in hal_vp8d_vdpu2_gen_regs()
569 regs->reg151.sw_quant_delta_2 = pic_param->y2ac_delta_q; in hal_vp8d_vdpu2_gen_regs()
570 regs->reg151.sw_quant_delta_3 = pic_param->uvdc_delta_q; in hal_vp8d_vdpu2_gen_regs()
571 regs->reg152.sw_quant_delta_4 = pic_param->uvac_delta_q; in hal_vp8d_vdpu2_gen_regs()
574 regs->reg133.sw_filt_ref_adj_0 = pic_param->ref_lf_deltas[0]; in hal_vp8d_vdpu2_gen_regs()
575 regs->reg133.sw_filt_ref_adj_1 = pic_param->ref_lf_deltas[1]; in hal_vp8d_vdpu2_gen_regs()
576 regs->reg133.sw_filt_ref_adj_2 = pic_param->ref_lf_deltas[2]; in hal_vp8d_vdpu2_gen_regs()
577 regs->reg133.sw_filt_ref_adj_3 = pic_param->ref_lf_deltas[3]; in hal_vp8d_vdpu2_gen_regs()
578 regs->reg132.sw_filt_mb_adj_0 = pic_param->mode_lf_deltas[0]; in hal_vp8d_vdpu2_gen_regs()
579 regs->reg132.sw_filt_mb_adj_1 = pic_param->mode_lf_deltas[1]; in hal_vp8d_vdpu2_gen_regs()
580 regs->reg132.sw_filt_mb_adj_2 = pic_param->mode_lf_deltas[2]; in hal_vp8d_vdpu2_gen_regs()
581 regs->reg132.sw_filt_mb_adj_3 = pic_param->mode_lf_deltas[3]; in hal_vp8d_vdpu2_gen_regs()
590 regs->reg57_enable_ctrl.sw_dec_e = 1; in hal_vp8d_vdpu2_gen_regs()
612 p = (RK_U32*)ctx->regs; in hal_vp8d_vdpu2_dump_info()
644 VP8DRegSet_t *regs = (VP8DRegSet_t *)ctx->regs; in hal_vp8d_vdpu2_start() local
655 wr_cfg.reg = regs; in hal_vp8d_vdpu2_start()
665 rd_cfg.reg = regs; in hal_vp8d_vdpu2_start()