Lines Matching refs:pp

39     DXVA_PicParams_MPEG4_PART2 *pp = NULL;  in vdpu1_mpg4d_setup_regs_by_syntax()  local
50 pp = (DXVA_PicParams_MPEG4_PART2 *)desc->pvPVPState; in vdpu1_mpg4d_setup_regs_by_syntax()
66 mpp_assert(pp); in vdpu1_mpg4d_setup_regs_by_syntax()
83 regs->SwReg04.sw_pic_mb_width = (pp->vop_width + 15) >> 4; in vdpu1_mpg4d_setup_regs_by_syntax()
84 regs->SwReg04.sw_pic_mb_hight_p = (pp->vop_height + 15) >> 4; in vdpu1_mpg4d_setup_regs_by_syntax()
86 if (pp->custorm_version == 4) { in vdpu1_mpg4d_setup_regs_by_syntax()
87 regs->SwReg04.sw_mb_width_off = pp->vop_width & 0xf; in vdpu1_mpg4d_setup_regs_by_syntax()
88 regs->SwReg04.sw_mb_height_off = pp->vop_height & 0xf; in vdpu1_mpg4d_setup_regs_by_syntax()
101 regs->SwReg18.sw_alt_scan_flag_e = pp->alternate_vertical_scan_flag; in vdpu1_mpg4d_setup_regs_by_syntax()
105 regs->SwReg18.sw_mpeg4_vc1_rc = pp->vop_rounding_type; in vdpu1_mpg4d_setup_regs_by_syntax()
106 regs->SwReg05.sw_intradc_vlc_thr = pp->intra_dc_vlc_thr; in vdpu1_mpg4d_setup_regs_by_syntax()
107 regs->SwReg06.sw_init_qp = pp->vop_quant; in vdpu1_mpg4d_setup_regs_by_syntax()
129 regs->SwReg05.sw_vop_time_incr = pp->vop_time_increment_resolution; in vdpu1_mpg4d_setup_regs_by_syntax()
131 switch (pp->vop_coding_type) { in vdpu1_mpg4d_setup_regs_by_syntax()
133 RK_U32 time_bp = pp->time_bp; in vdpu1_mpg4d_setup_regs_by_syntax()
134 RK_U32 time_pp = pp->time_pp; in vdpu1_mpg4d_setup_regs_by_syntax()
163 regs->SwReg18.sw_fcode_fwd_hor = pp->vop_fcode_forward; in vdpu1_mpg4d_setup_regs_by_syntax()
164 regs->SwReg18.sw_fcode_fwd_ver = pp->vop_fcode_forward; in vdpu1_mpg4d_setup_regs_by_syntax()
165 regs->SwReg18.sw_fcode_bwd_hor = pp->vop_fcode_backward; in vdpu1_mpg4d_setup_regs_by_syntax()
166 regs->SwReg18.sw_fcode_bwd_ver = pp->vop_fcode_backward; in vdpu1_mpg4d_setup_regs_by_syntax()
187 regs->SwReg18.sw_fcode_fwd_hor = pp->vop_fcode_forward; in vdpu1_mpg4d_setup_regs_by_syntax()
188 regs->SwReg18.sw_fcode_fwd_ver = pp->vop_fcode_forward; in vdpu1_mpg4d_setup_regs_by_syntax()
212 if (pp->interlaced) { in vdpu1_mpg4d_setup_regs_by_syntax()
215 regs->SwReg04.sw_topfieldfirst_e = pp->top_field_first; in vdpu1_mpg4d_setup_regs_by_syntax()
218 regs->SwReg18.sw_prev_anc_type = pp->prev_coding_type; in vdpu1_mpg4d_setup_regs_by_syntax()
219 regs->SwReg05.sw_type1_quant_e = pp->quant_type; in vdpu1_mpg4d_setup_regs_by_syntax()
221 regs->SwReg18.sw_mv_accuracy_fwd = pp->quarter_sample; in vdpu1_mpg4d_setup_regs_by_syntax()