Lines Matching refs:fd_curr
150 regs->SwReg14.sw_refer0_base = (RK_U32)ctx->fd_curr; in vdpu1_mpg4d_setup_regs_by_syntax()
151 regs->SwReg15.sw_refer1_base = (RK_U32)ctx->fd_curr; in vdpu1_mpg4d_setup_regs_by_syntax()
159 regs->SwReg16.sw_refer2_base = (RK_U32)ctx->fd_curr; in vdpu1_mpg4d_setup_regs_by_syntax()
160 regs->SwReg17.sw_refer3_base = (RK_U32)ctx->fd_curr; in vdpu1_mpg4d_setup_regs_by_syntax()
181 regs->SwReg14.sw_refer0_base = (RK_U32)ctx->fd_curr; in vdpu1_mpg4d_setup_regs_by_syntax()
182 regs->SwReg15.sw_refer1_base = (RK_U32)ctx->fd_curr; in vdpu1_mpg4d_setup_regs_by_syntax()
184 regs->SwReg16.sw_refer2_base = (RK_U32)ctx->fd_curr; in vdpu1_mpg4d_setup_regs_by_syntax()
185 regs->SwReg17.sw_refer3_base = (RK_U32)ctx->fd_curr; in vdpu1_mpg4d_setup_regs_by_syntax()
196 regs->SwReg14.sw_refer0_base = (RK_U32)ctx->fd_curr; in vdpu1_mpg4d_setup_regs_by_syntax()
197 regs->SwReg15.sw_refer1_base = (RK_U32)ctx->fd_curr; in vdpu1_mpg4d_setup_regs_by_syntax()
198 regs->SwReg16.sw_refer2_base = (RK_U32)ctx->fd_curr; in vdpu1_mpg4d_setup_regs_by_syntax()
199 regs->SwReg17.sw_refer3_base = (RK_U32)ctx->fd_curr; in vdpu1_mpg4d_setup_regs_by_syntax()
382 ctx->fd_curr = mpp_buffer_get_fd(buf_frm_curr); in vdpu1_mpg4d_gen_regs()
385 regs->SwReg13.dec_out_st_adr = (RK_U32)ctx->fd_curr; in vdpu1_mpg4d_gen_regs()