vpu/m2vd/hal_m2vd_vdpu1.c

43     ret = mpp_dev_init(&ctx->dev, VPU_CLIENT_VDPU1);  in hal_m2vd_vdpu1_init()
66     cfg->dev            = ctx->dev;  in hal_m2vd_vdpu1_init()
88     if (p->dev) {  in hal_m2vd_vdpu1_deinit()
89         mpp_dev_deinit(p->dev);  in hal_m2vd_vdpu1_deinit()
90         p->dev = NULL;  in hal_m2vd_vdpu1_deinit()
218             mpp_dev_set_reg_offset(ctx->dev, 12, dx->bitstream_offset);  in hal_m2vd_vdpu1_gen_regs()
228             mpp_dev_set_reg_offset(ctx->dev, 13, MPP_ALIGN(dx->seq.decode_width, 16));  in hal_m2vd_vdpu1_gen_regs()
275         ret = mpp_dev_ioctl(ctx->dev, MPP_DEV_REG_WR, &wr_cfg);  in hal_m2vd_vdpu1_start()
285         ret = mpp_dev_ioctl(ctx->dev, MPP_DEV_REG_RD, &rd_cfg);  in hal_m2vd_vdpu1_start()
291         ret = mpp_dev_ioctl(ctx->dev, MPP_DEV_CMD_SEND, NULL);  in hal_m2vd_vdpu1_start()
308     ret = mpp_dev_ioctl(ctx->dev, MPP_DEV_CMD_POLL, NULL);  in hal_m2vd_vdpu1_wait()