159                                     RK_S32 hor_stride, RK_S32 pixel_size)  in check_stride_by_pixel()  argument
161     if (!workaround && hor_stride < width * pixel_size) {  in check_stride_by_pixel()
163                 hor_stride, width, pixel_size);  in check_stride_by_pixel()
165                 hor_stride, pixel_size, hor_stride * pixel_size);  in check_stride_by_pixel()
172 static RK_S32 check_8_pixel_aligned(RK_S32 workaround, RK_S32 hor_stride,  in check_8_pixel_aligned()  argument
176     if (!workaround && hor_stride != MPP_ALIGN_GEN(hor_stride, pixel_aign * pixel_size)) {  in check_8_pixel_aligned()
180                 MPP_ALIGN_GEN(hor_stride, pixel_aign * pixel_size));  in check_8_pixel_aligned()
189     RK_U32 hor_stride = stride;  in get_vepu_pixel_stride()  local
206         if (check_8_pixel_aligned(cfg->not_8_pixel, hor_stride, 8, 1, "YUV420SP")) {  in get_vepu_pixel_stride()
207             hor_stride = MPP_ALIGN(hor_stride, 8);  in get_vepu_pixel_stride()
212         if (check_8_pixel_aligned(cfg->not_8_pixel, hor_stride, 16, 1, "YUV420P")) {  in get_vepu_pixel_stride()
213             hor_stride = MPP_ALIGN(hor_stride, 8);  in get_vepu_pixel_stride()
220                                   hor_stride, 2)) {  in get_vepu_pixel_stride()
221             hor_stride *= 2;  in get_vepu_pixel_stride()
225         if (check_8_pixel_aligned(cfg->not_8_pixel, hor_stride, 8, 2, "YUV422_interleave")) {  in get_vepu_pixel_stride()
226             hor_stride = MPP_ALIGN(hor_stride, 16);  in get_vepu_pixel_stride()
230         hor_stride /= 2;  in get_vepu_pixel_stride()
240                                   hor_stride, 2)) {  in get_vepu_pixel_stride()
241             hor_stride *= 2;  in get_vepu_pixel_stride()
245         if (check_8_pixel_aligned(cfg->not_8_pixel, hor_stride, 8, 2, "32bit RGB")) {  in get_vepu_pixel_stride()
246             hor_stride = MPP_ALIGN(hor_stride, 16);  in get_vepu_pixel_stride()
250         hor_stride /= 2;  in get_vepu_pixel_stride()
260                                   hor_stride, 4)) {  in get_vepu_pixel_stride()
261             hor_stride *= 4;  in get_vepu_pixel_stride()
265         if (check_8_pixel_aligned(cfg->not_8_pixel, hor_stride, 8, 4, "16bit RGB")) {  in get_vepu_pixel_stride()
266             hor_stride = MPP_ALIGN(hor_stride, 32);  in get_vepu_pixel_stride()
270         hor_stride /= 4;  in get_vepu_pixel_stride()
277     cfg->pixel_stride = hor_stride;  in get_vepu_pixel_stride()
280     return hor_stride;  in get_vepu_pixel_stride()
287     RK_U32 hor_stride   = cfg->hor_stride;  in get_vepu_offset_cfg()  local
291     RK_U32 offset_c     = hor_stride * ver_stride;  in get_vepu_offset_cfg()
299             cfg->offset_byte[0] = offset_y * hor_stride + offset_x;  in get_vepu_offset_cfg()
300             cfg->offset_byte[1] = offset_y / 2 * hor_stride + offset_x + offset_c;  in get_vepu_offset_cfg()
303             cfg->offset_byte[0] = offset_y * hor_stride + offset_x;  in get_vepu_offset_cfg()
304             cfg->offset_byte[1] = (offset_y / 2) * (hor_stride / 2) + (offset_x / 2) + offset_c;  in get_vepu_offset_cfg()
305 …       cfg->offset_byte[2] = (offset_y / 2) * (hor_stride / 2) + (offset_x / 2) + offset_c * 5 / 4;  in get_vepu_offset_cfg()
310             cfg->offset_byte[0] = offset_y * hor_stride + offset_x * 2;  in get_vepu_offset_cfg()
318             cfg->offset_byte[0] = offset_y * hor_stride + offset_x * 2;  in get_vepu_offset_cfg()
326             cfg->offset_byte[0] = offset_y * hor_stride + offset_x * 4;  in get_vepu_offset_cfg()
335             RK_U32 offset = hor_stride * ver_stride;  in get_vepu_offset_cfg()
340                 offset = hor_stride * ver_stride * 5 / 4;  in get_vepu_offset_cfg()