Lines Matching refs:coding
793 if (!dxva->coding.intrabc) { in vdpu_av1d_set_reference_frames()
814 if (dxva->coding.intrabc) { in vdpu_av1d_set_reference_frames()
868 if (dxva->coding.intrabc) { in vdpu_av1d_set_reference_frames()
1021 if (dxva->coding.use_ref_frame_mvs && ref_ind > 0 && in vdpu_av1d_set_reference_frames()
1028 if (dxva->coding.use_ref_frame_mvs && ref_ind > 1 && in vdpu_av1d_set_reference_frames()
1035 if (dxva->coding.use_ref_frame_mvs && ref_ind > 2 && in vdpu_av1d_set_reference_frames()
1123 if (dxva->coding.superres) { in vdpu_av1d_superres_params()
1243 regs->swreg5.sw_error_resilient = dxva->coding.error_resilient_mode; in vdpu_av1d_set_segmentation()
1499 …if (!leftmost && dxva->coding.use_128x128_superblock == 0 && dxva->coding.superres && width == 1) { in check_tile_width()
1504 const RK_S32 sb_size_log2 = dxva->coding.use_128x128_superblock ? 7 : 6; in check_tile_width()
1506 if (dxva->coding.superres) { in check_tile_width()
1511 if (dxva->coding.superres) in check_tile_width()
1568 if ((x0 << (dxva->coding.use_128x128_superblock ? 7 : 6)) >= dxva->width || in vdpu_av1d_set_tile_info_mem()
1569 (y0 << (dxva->coding.use_128x128_superblock ? 7 : 6)) >= dxva->height) in vdpu_av1d_set_tile_info_mem()
1937 regs->swreg3.sw_skip_mode = dxva->coding.skip_mode; in vdpu_av1d_gen_regs()
1942 regs->swreg5.sw_tempor_mvp_e = dxva->coding.use_ref_frame_mvs; in vdpu_av1d_gen_regs()
1946 regs->swreg5.sw_disable_cdf_update = dxva->coding.disable_cdf_update; in vdpu_av1d_gen_regs()
1947 regs->swreg5.sw_allow_warp = dxva->coding.warped_motion; in vdpu_av1d_gen_regs()
1949 regs->swreg5.sw_switchable_motion_mode = dxva->coding.switchable_motion_mode; in vdpu_av1d_gen_regs()
1955 regs->swreg5.sw_allow_masked_compound = dxva->coding.masked_compound; in vdpu_av1d_gen_regs()
1956 regs->swreg5.sw_allow_interintra = dxva->coding.interintra_compound; in vdpu_av1d_gen_regs()
1957 regs->swreg5.sw_enable_intra_edge_filter = dxva->coding.intra_edge_filter; in vdpu_av1d_gen_regs()
1958 regs->swreg5.sw_allow_filter_intra = dxva->coding.filter_intra; in vdpu_av1d_gen_regs()
1959 regs->swreg5.sw_enable_jnt_comp = dxva->coding.jnt_comp; in vdpu_av1d_gen_regs()
1960 regs->swreg5.sw_enable_dual_filter = dxva->coding.dual_filter; in vdpu_av1d_gen_regs()
1961 regs->swreg5.sw_reduced_tx_set_used = dxva->coding.reduced_tx_set; in vdpu_av1d_gen_regs()
1962 regs->swreg5.sw_allow_screen_content_tools = dxva->coding.screen_content_tools; in vdpu_av1d_gen_regs()
1963 regs->swreg5.sw_allow_intrabc = dxva->coding.intrabc; in vdpu_av1d_gen_regs()
1965 regs->swreg5.sw_force_interger_mv = dxva->coding.integer_mv; in vdpu_av1d_gen_regs()
1971 || dxva->coding.intrabc) { in vdpu_av1d_gen_regs()
2068 regs->swreg11.sw_high_prec_mv_e = dxva->coding.high_precision_mv; in vdpu_av1d_gen_regs()
2069 regs->swreg11.sw_comp_pred_mode = dxva->coding.reference_mode ? 2 : 0; in vdpu_av1d_gen_regs()
2070 regs->swreg11.sw_transform_mode = dxva->coding.tx_mode ? (dxva->coding.tx_mode + 2) : 0; in vdpu_av1d_gen_regs()
2071 regs->swreg12.sw_max_cb_size = dxva->coding.use_128x128_superblock ? 7 : 6;; in vdpu_av1d_gen_regs()
2419 .coding = MPP_VIDEO_CodingAV1,