66     VdpuAv1dRegSet  *regs;
103     VdpuAv1dRegSet  *regs;
144         reg_ctx->reg_buf[i].regs = mpp_calloc(VdpuAv1dRegSet, 1);  in hal_av1d_alloc_res()
145         memset(reg_ctx->reg_buf[i].regs, 0, sizeof(VdpuAv1dRegSet));  in hal_av1d_alloc_res()
290 static void set_ref_width(VdpuAv1dRegSet *regs, RK_S32 i, RK_S32 val)  in set_ref_width()
311 static void set_ref_height(VdpuAv1dRegSet *regs, RK_S32 i, RK_S32 val)  in set_ref_height()
332 static void set_ref_hor_scale(VdpuAv1dRegSet *regs, RK_S32 i, RK_S32 val)  in set_ref_hor_scale()
353 static void set_ref_ver_scale(VdpuAv1dRegSet *regs, RK_S32 i, RK_S32 val)  in set_ref_ver_scale()
374 static void set_ref_lum_base(VdpuAv1dRegSet *regs, RK_S32 i, RK_S32 val, HalBufs bufs)  in set_ref_lum_base()
404 static void set_ref_lum_base_msb(VdpuAv1dRegSet *regs, RK_S32 i, RK_S32 val)  in set_ref_lum_base_msb()
428     VdpuAv1dRegSet *regs = ctx->regs;  in set_ref_cb_base()
466 static void set_ref_cb_base_msb(VdpuAv1dRegSet *regs, RK_S32 i, RK_S32 val)  in set_ref_cb_base_msb()
491     VdpuAv1dRegSet *regs = ctx->regs;  in set_ref_dbase()
528 static void set_ref_dbase_msb(VdpuAv1dRegSet *regs, RK_S32 i, RK_S32 val)  in set_ref_dbase_msb()
549 static void set_ref_ty_base(VdpuAv1dRegSet *regs, RK_S32 i, RK_S32 val, HalBufs bufs)  in set_ref_ty_base()
580 static void set_ref_ty_base_msb(VdpuAv1dRegSet *regs, RK_S32 i, RK_S32 val)  in set_ref_ty_base_msb()
601 static void set_ref_tc_base(VdpuAv1dRegSet *regs, RK_S32 i, RK_S32 val, HalBufs bufs)  in set_ref_tc_base()
633 static void set_ref_tc_base_msb(VdpuAv1dRegSet *regs, RK_S32 i, RK_S32 val)  in set_ref_tc_base_msb()
654 static void set_ref_sign_bias(VdpuAv1dRegSet *regs, RK_S32 i, RK_S32 val)  in set_ref_sign_bias()
764     VdpuAv1dRegSet *regs = reg_ctx->regs;  in vdpu_av1d_set_prob()
785     VdpuAv1dRegSet *regs = ctx->regs;  in vdpu_av1d_set_reference_frames()
1113     VdpuAv1dRegSet *regs = ctx->regs;  in vdpu_av1d_superres_params()
1216     VdpuAv1dRegSet *regs = ctx->regs;  in vdpu_av1d_set_picture_dimensions()
1232     VdpuAv1dRegSet *regs = ctx->regs;  in vdpu_av1d_set_segmentation()
1396     VdpuAv1dRegSet *regs = ctx->regs;  in vdpu_av1d_set_loopfilter()
1432     VdpuAv1dRegSet *regs = ctx->regs;  in vdpu_av1d_set_global_model()
1474     VdpuAv1dRegSet *regs = ctx->regs;  in vdpu_av1d_set_tile_info_regs()
1617     VdpuAv1dRegSet *regs = ctx->regs;  in vdpu_av1d_set_cdef()
1645     VdpuAv1dRegSet *regs = ctx->regs;  in vdpu_av1d_set_lr()
1691     VdpuAv1dRegSet *regs = ctx->regs;  in vdpu_av1d_set_fgs()
1858     VdpuAv1dRegSet *regs;  in vdpu_av1d_gen_regs()
2248     VdpuAv1dRegSet *regs = p_hal->fast_mode ?  in vdpu_av1d_start()
2310     VdpuAv1dRegSet *p_regs = p_hal->fast_mode ?  in vdpu_av1d_wait()