Lines Matching refs:reg_base
376 JpegeVpu720BaseReg *reg_base = ®s->reg_base; in hal_jpege_vpu720_gen_regs() local
411 reg_base->reg001_enc_strt.lkt_num = 0; in hal_jpege_vpu720_gen_regs()
412 reg_base->reg001_enc_strt.vepu_cmd = ctx->enc_mode; in hal_jpege_vpu720_gen_regs()
415 reg_base->reg004_int_en.fenc_done_en = 1; in hal_jpege_vpu720_gen_regs()
416 reg_base->reg004_int_en.lkt_node_done_en = 1; in hal_jpege_vpu720_gen_regs()
417 reg_base->reg004_int_en.sclr_done_en = 1; in hal_jpege_vpu720_gen_regs()
418 reg_base->reg004_int_en.vslc_done_en = 1; in hal_jpege_vpu720_gen_regs()
419 reg_base->reg004_int_en.vbsb_oflw_en = 1; in hal_jpege_vpu720_gen_regs()
420 reg_base->reg004_int_en.vbsb_sct_en = 1; in hal_jpege_vpu720_gen_regs()
421 reg_base->reg004_int_en.fenc_err_en = 1; in hal_jpege_vpu720_gen_regs()
422 reg_base->reg004_int_en.wdg_en = 1; in hal_jpege_vpu720_gen_regs()
423 reg_base->reg004_int_en.lkt_oerr_en = 1; in hal_jpege_vpu720_gen_regs()
424 reg_base->reg004_int_en.lkt_estp_en = 1; in hal_jpege_vpu720_gen_regs()
425 reg_base->reg004_int_en.lkt_fstp_en = 1; in hal_jpege_vpu720_gen_regs()
426 reg_base->reg004_int_en.lkt_note_stp_en = 1; in hal_jpege_vpu720_gen_regs()
427 reg_base->reg004_int_en.lkt_data_error_en = 1; in hal_jpege_vpu720_gen_regs()
429 reg_base->reg005_int_msk.fenc_done_msk = 1; in hal_jpege_vpu720_gen_regs()
430 reg_base->reg005_int_msk.lkt_node_done_msk = 1; in hal_jpege_vpu720_gen_regs()
431 reg_base->reg005_int_msk.sclr_done_msk = 1; in hal_jpege_vpu720_gen_regs()
432 reg_base->reg005_int_msk.vslc_done_msk = 1; in hal_jpege_vpu720_gen_regs()
433 reg_base->reg005_int_msk.vbsb_oflw_msk = 1; in hal_jpege_vpu720_gen_regs()
434 reg_base->reg005_int_msk.vbsb_sct_msk = 1; in hal_jpege_vpu720_gen_regs()
435 reg_base->reg005_int_msk.fenc_err_msk = 1; in hal_jpege_vpu720_gen_regs()
436 reg_base->reg005_int_msk.wdg_msk = 1; in hal_jpege_vpu720_gen_regs()
437 reg_base->reg005_int_msk.lkt_oerr_msk = 1; in hal_jpege_vpu720_gen_regs()
438 reg_base->reg005_int_msk.lkt_estp_msk = 1; in hal_jpege_vpu720_gen_regs()
439 reg_base->reg005_int_msk.lkt_fstp_msk = 1; in hal_jpege_vpu720_gen_regs()
440 reg_base->reg005_int_msk.lkt_note_stp_msk = 1; in hal_jpege_vpu720_gen_regs()
441 reg_base->reg005_int_msk.lkt_data_error_msk = 1; in hal_jpege_vpu720_gen_regs()
443 reg_base->reg008_cru_ctrl.resetn_hw_en = 1; in hal_jpege_vpu720_gen_regs()
444 reg_base->reg008_cru_ctrl.sram_ckg_en = 1; in hal_jpege_vpu720_gen_regs()
445 reg_base->reg008_cru_ctrl.cke = 1; in hal_jpege_vpu720_gen_regs()
447 reg_base->reg042_dbus_endn.jbsw_bus_edin = 0xf; in hal_jpege_vpu720_gen_regs()
448 reg_base->reg042_dbus_endn.vsl_bus_edin = 0; in hal_jpege_vpu720_gen_regs()
449 reg_base->reg042_dbus_endn.ecs_len_edin = 0xf; in hal_jpege_vpu720_gen_regs()
450 reg_base->reg042_dbus_endn.sw_qtbl_edin = 0; in hal_jpege_vpu720_gen_regs()
452 reg_base->reg011_wdg_jpeg = syntax->mcu_cnt * 1000; in hal_jpege_vpu720_gen_regs()
454 reg_base->reg026_axi_perf_ctrl0.perf_work_e = 1; in hal_jpege_vpu720_gen_regs()
455 reg_base->reg026_axi_perf_ctrl0.perf_clr_e = 1; in hal_jpege_vpu720_gen_regs()
468 reg_base->reg029_sw_enc_rsl.pic_wd8_m1 = encode_width / 8 - 1; in hal_jpege_vpu720_gen_regs()
469 reg_base->reg029_sw_enc_rsl.pic_hd8_m1 = encode_height / 8 - 1; in hal_jpege_vpu720_gen_regs()
470 reg_base->reg030_sw_src_fill.pic_wfill_jpeg = encode_width - syntax->width; in hal_jpege_vpu720_gen_regs()
471 reg_base->reg030_sw_src_fill.pic_hfill_jpeg = encode_height - syntax->height; in hal_jpege_vpu720_gen_regs()
473 reg_base->reg032_sw_src_fmt.src_fmt = ctx->fmt_cfg.input_format; in hal_jpege_vpu720_gen_regs()
474 reg_base->reg032_sw_src_fmt.out_fmt = ctx->fmt_cfg.out_format; in hal_jpege_vpu720_gen_regs()
475 reg_base->reg032_sw_src_fmt.rbuv_swap_jpeg = ctx->fmt_cfg.uv_swap; in hal_jpege_vpu720_gen_regs()
476 reg_base->reg032_sw_src_fmt.chroma_ds_mode = ctx->fmt_cfg.chroma_ds_mode; in hal_jpege_vpu720_gen_regs()
477 reg_base->reg032_sw_src_fmt.src_mirr_jpeg = ctx->fmt_cfg.mirror; in hal_jpege_vpu720_gen_regs()
478 reg_base->reg032_sw_src_fmt.chroma_force_en = ctx->fmt_cfg.fix_chroma_en; in hal_jpege_vpu720_gen_regs()
479 reg_base->reg032_sw_src_fmt.u_force_value = ctx->fmt_cfg.fix_chroma_u; in hal_jpege_vpu720_gen_regs()
480 reg_base->reg032_sw_src_fmt.v_force_value = ctx->fmt_cfg.fix_chroma_v; in hal_jpege_vpu720_gen_regs()
483 reg_base->reg032_sw_src_fmt.src_range_trns_en = 1; in hal_jpege_vpu720_gen_regs()
485 reg_base->reg032_sw_src_fmt.src_range_trns_sel = JPEG_VPU720_COLOR_RANGE_LIMIT_TO_FULL; in hal_jpege_vpu720_gen_regs()
487 reg_base->reg032_sw_src_fmt.src_range_trns_sel = JPEG_VPU720_COLOR_RANGE_FULL_TO_LIMIT; in hal_jpege_vpu720_gen_regs()
490 reg_base->reg033_sw_pic_ofst.pic_ofst_x = mpp_frame_get_offset_x(task->frame); in hal_jpege_vpu720_gen_regs()
491 reg_base->reg033_sw_pic_ofst.pic_ofst_y = mpp_frame_get_offset_y(task->frame); in hal_jpege_vpu720_gen_regs()
493 reg_base->reg034_sw_src_strd_0.src_strd_0 = ctx->fmt_cfg.y_stride; in hal_jpege_vpu720_gen_regs()
494 reg_base->reg035_sw_src_strd_1.src_strd_1 = ctx->fmt_cfg.uv_stride; in hal_jpege_vpu720_gen_regs()
496 reg_base->reg036_sw_jpeg_enc_cfg.rst_intv = syntax->restart_ri; in hal_jpege_vpu720_gen_regs()
497 reg_base->reg036_sw_jpeg_enc_cfg.rst_m = 0; in hal_jpege_vpu720_gen_regs()
498 reg_base->reg036_sw_jpeg_enc_cfg.pic_last_ecs = 1; in hal_jpege_vpu720_gen_regs()
500 reg_base->reg022_adr_src0 = mpp_buffer_get_fd(task->input); in hal_jpege_vpu720_gen_regs()
501 reg_base->reg023_adr_src1 = reg_base->reg022_adr_src0; in hal_jpege_vpu720_gen_regs()
502 reg_base->reg024_adr_src2 = reg_base->reg022_adr_src0; in hal_jpege_vpu720_gen_regs()
504 reg_base->reg017_adr_bsbt = mpp_buffer_get_fd(task->output); in hal_jpege_vpu720_gen_regs()
505 reg_base->reg018_adr_bsbb = reg_base->reg017_adr_bsbt; in hal_jpege_vpu720_gen_regs()
506 reg_base->reg019_adr_bsbr = reg_base->reg017_adr_bsbt; in hal_jpege_vpu720_gen_regs()
507 reg_base->reg020_adr_bsbs = reg_base->reg017_adr_bsbt; in hal_jpege_vpu720_gen_regs()
509 reg_base->reg016_adr_qtbl = mpp_buffer_get_fd(ctx->qtbl_buffer); in hal_jpege_vpu720_gen_regs()
548 cfg_base.reg = ®s->reg_base; in hal_jpege_vpu720_start()