Lines Matching refs:w
791 MPP_RET vepu541_h265_set_roi(void *dst_buf, void *src_buf, RK_S32 w, RK_S32 h) in vepu541_h265_set_roi() argument
795 RK_S32 mb_w = MPP_ALIGN(w, 64) / 64; in vepu541_h265_set_roi()
824 RK_U32 w = ctx->cfg->prep.width; in setup_vepu541_intra_refresh() local
826 RK_U32 stride_h = MPP_ALIGN(w / 16, 4); in setup_vepu541_intra_refresh()
838 roi_buf_size = vepu541_get_roi_buf_size(w, h); in setup_vepu541_intra_refresh()
876 region->w = w; in setup_vepu541_intra_refresh()
890 region->w = 64 * ctx->cfg->rc.refresh_num + 128; in setup_vepu541_intra_refresh()
893 region->w = 64 * ctx->cfg->rc.refresh_num; in setup_vepu541_intra_refresh()
907 vepu541_set_one_roi(buf, region, w, h); in setup_vepu541_intra_refresh()
908 vepu541_h265_set_roi(dst_buf, buf, w, h); in setup_vepu541_intra_refresh()
931 RK_U32 w = ctx->cfg->prep.width; in vepu541_h265_set_roi_regs() local
938 RK_U32 roi_buf_size = vepu541_get_roi_buf_size(w, h); in vepu541_h265_set_roi_regs()
964 vepu541_set_roi(ctx->roi_buf_tmp, cfg, w, h); in vepu541_h265_set_roi_regs()
965 vepu541_h265_set_roi(roi_base, ctx->roi_buf_tmp, w, h); in vepu541_h265_set_roi_regs()