Lines Matching refs:sli_spl
1461 regs->sli_spl.sli_splt = 0; in setup_vepu541_split()
1462 regs->sli_spl.sli_splt_mode = 0; in setup_vepu541_split()
1463 regs->sli_spl.sli_splt_cpst = 0; in setup_vepu541_split()
1464 regs->sli_spl.sli_max_num_m1 = 0; in setup_vepu541_split()
1465 regs->sli_spl.sli_flsh = 0; in setup_vepu541_split()
1466 regs->sli_spl.sli_splt_cnum_m1 = 0; in setup_vepu541_split()
1472 regs->sli_spl.sli_splt = 1; in setup_vepu541_split()
1473 regs->sli_spl.sli_splt_mode = 0; in setup_vepu541_split()
1474 regs->sli_spl.sli_splt_cpst = 0; in setup_vepu541_split()
1475 regs->sli_spl.sli_max_num_m1 = 500; in setup_vepu541_split()
1476 regs->sli_spl.sli_flsh = 1; in setup_vepu541_split()
1477 regs->sli_spl.sli_splt_cnum_m1 = 0; in setup_vepu541_split()
1483 regs->sli_spl.sli_splt = 1; in setup_vepu541_split()
1484 regs->sli_spl.sli_splt_mode = 1; in setup_vepu541_split()
1485 regs->sli_spl.sli_splt_cpst = 0; in setup_vepu541_split()
1486 regs->sli_spl.sli_max_num_m1 = 500; in setup_vepu541_split()
1487 regs->sli_spl.sli_flsh = 1; in setup_vepu541_split()
1488 regs->sli_spl.sli_splt_cnum_m1 = cfg->split_arg - 1; in setup_vepu541_split()