Lines Matching refs:pic_width
981 mb_wd64 = (syn->pp.pic_width + 63) / 64; in vepu541_h265_set_rc_regs()
1236 RK_S32 pic_wd64 = MPP_ALIGN(syn->pp.pic_width, 64) >> 6; in vepu541_h265_set_me_regs()
1245 if (syn->pp.pic_width < merangx + 60 || syn->pp.pic_width <= 352) { in vepu541_h265_set_me_regs()
1246 if (merangx > syn->pp.pic_width ) { in vepu541_h265_set_me_regs()
1247 merangx = syn->pp.pic_width; in vepu541_h265_set_me_regs()
1295 if (syn->pp.pic_width > 2688) { in vepu541_h265_set_me_regs()
1297 } else if (syn->pp.pic_width > 2048) { in vepu541_h265_set_me_regs()
1335 RK_S32 pic_wd64 = MPP_ALIGN(syn->pp.pic_width, 64) >> 6; in vepu540_h265_set_me_ram()
1513 pic_width_align8 = (syn->pp.pic_width + 7) & (~7); in hal_h265e_v541_gen_regs()
1515 pic_wd64 = (syn->pp.pic_width + 63) / 64; in hal_h265e_v541_gen_regs()
1540 regs->enc_rsl.pic_wfill = (syn->pp.pic_width & 0x7) in hal_h265e_v541_gen_regs()
1541 ? (8 - (syn->pp.pic_width & 0x7)) : 0; in hal_h265e_v541_gen_regs()